GNU bug report logs - #73717
[PATCH] gnu: Add yosys-clang.

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From: Cayetano Santos <csantosb <at> inventati.org>
To: 73717 <at> debbugs.gnu.org
Cc: Cayetano Santos <csantosb <at> inventati.org>, ( <paren <at> disroot.org>, Christopher Baines <guix <at> cbaines.net>, Ludovic Courtès <ludo <at> gnu.org>, Mathieu Othacehe <othacehe <at> gnu.org>, Simon Tournier <zimon.toutoune <at> gmail.com>, Tobias Geerinckx-Rice <me <at> tobias.gr>, jgart <jgart <at> dismail.de>
Subject: [bug#73717] [PATCH v1] gnu: Add yosys-clang.
Date: Tue, 29 Oct 2024 09:55:46 +0100

* gnu/packages/fpga.scm (yosys-clang): New variable.

Change-Id: Iedbd418adc152c325d106830d9d33b73f01e65da
---
 gnu/packages/fpga.scm | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 68f36d501f..5ede463dde 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -224,6 +224,26 @@ (define-public yosys
     (description "Yosys synthesizes Verilog-2005.")
     (license license:isc)))
 
+(define-public yosys-clang
+  (package
+    (inherit yosys)
+    (name "yosys-clang")
+    (arguments
+     (substitute-keyword-arguments (package-arguments yosys)
+       ((#:make-flags _ #f)
+        #~(list "CC=clang"
+                "CXX=clang++"
+                (string-append "PREFIX=" #$output)))
+       ((#:phases phases)
+        #~(modify-phases #$phases
+            (replace 'configure
+              (lambda* (#:key make-flags #:allow-other-keys)
+                (apply invoke "make" "config-clang" make-flags)))))))
+    (inputs
+     (modify-inputs (package-inputs yosys)
+       (append clang)))
+    (synopsis "FPGA Verilog RTL synthesizer (Clang variant)")))
+
 (define-public icestorm
   (let ((commit "2bc541743ada3542c6da36a50e66303b9cbd2059")
         (revision "4"))

base-commit: d44beb9b4ad836781928a0c5667e94c0d6df13f0
-- 
2.46.0

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