GNU bug report logs - #995
large verilog file hangs hilighting

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Message #5 received at submit <at> emacsbugs.donarmstrong.com (full text, mbox):

From: Warren L Dodge <warrend <at> Tektronix.com>
To: bug-gnu-emacs <at> gnu.org
Subject: large verilog file hangs hilighting
Date: Wed, 17 Sep 2008 14:59:51 -0700

emacs-22.2 -Q xxx.rtl.v &
M-> (end-of-buffer)

This takes quite a while to do on the enclosed data which I greating
reduced in size for the report. With th eoriginal file emacs would
become unresponsive for a very long time. The user would kill it to
exit this condition.

It appears to be a hi-liting issue where it is taking forever to
calculate the coloring.

Below is the sample file I trimmed to try and show the problem. It is
slow but resonable. I would hope the reason for the slowness could be
figured out from it. If needed I can supply the original file which is
about 5 times larger. Probably just copying sections of the sample to
make it larger will show the same issue.

In trying the last item I saw this.

Look for the entire first instance of trePackMnbvcdTop
from //XXXXX to //YYYYY

Copy it into the cut-buffer.

Paste it with c-y 5 times rapidly. emacs will hang with this.

Paste it many times slowly with a c-x c-x in between each c-y and
emacs continues to function

#############################################################################
Sample file xxx.rtl.v
#############################################################################

module tek037Core (

    // Simulation-only zero-time register access interfaces

  // Mpc bus interface
);

//XXXXXX
trePackMnbvcdTop
  trePackMnbvcd (
    `ifndef SYNTHESIS
    `ifdef SIM_CODE
     .Reg_if(PopPackMnbvcdRegXactAdapter_if),
    `endif
    `endif

     // lvcxz side reg interface
     .RegRdData(regRdData[`RegData_W*`RegPopPackMnbvcdId +: `RegData_W]),
     .RegRd(regRd[`RegPopPackMnbvcdId]),
     .RegRdAddr(regRdAddr),
     .RegWr(regWr[`RegPopPackMnbvcdId]),
     .RegWrAddr(regWrAddr),
     .RegWrData(regWrData),

      // trePackIolIf
     .PopPackIolReq(treIolReq[`PopIolPopPackId]),
     .PopPackIolWrEn(treIolWrEn[`PopIolPopPackId]),
     .PopPackIolAddr(treIolAddr[`PopIolAddr_W*`PopIolPopPackId +: `PopIolAddr_W]),
     .PopPackIolWrData(treIolWrData[`PopIolData_W*`PopIolPopPackId +: `PopIolData_W]),
     .PopPackIolByteWr(treIolByteWr[`PopIolByteWr_W*`PopIolPopPackId +: `PopIolByteWr_W]),
     .PopPackIolAck(treIolAck[`PopIolPopPackId]),
     .PopPackIolRdData(treIolRdData),
     .PopPackIolRdDataAck(treIolRdDataAck[`PopIolPopPackId]),

      // treMnbvcdIolIf
     .PopMnbvcdIolReq(treIolReq[`PopIolPopMnbvcdId]),
     .PopMnbvcdIgnoreReqHoldoff(treMnbvcdIgnoreReqHoldOff),
     .PopMnbvcdIolWrEn(treIolWrEn[`PopIolPopMnbvcdId]),
     .PopMnbvcdIolAddr(treIolAddr[`PopIolAddr_W*`PopIolPopMnbvcdId +: `PopIolAddr_W]),
     .PopMnbvcdIolWrData(treIolWrData[`PopIolData_W*`PopIolPopMnbvcdId +: `PopIolData_W]),
     .PopMnbvcdIolByteWr(treIolByteWr[`PopIolByteWr_W*`PopIolPopMnbvcdId +: `PopIolByteWr_W]),
     .PopMnbvcdIolAck(treIolAck[`PopIolPopMnbvcdId]),
     .PopMnbvcdIolRdData(treIolRdData),
     .PopMnbvcdIolRdDataAck(treIolRdDataAck[`PopIolPopMnbvcdId]),


     // sys interface 
     .SpinActive(devActive[`VE_SYS_START_SPIN_ID]),
     .SpinStart(devStart[`VE_SYS_START_SPIN_ID]),

     // runCtl
     .SpinRun(spinRun),
     .AcqDone(acqDone),
     .AcqRun(swerRun),

     // swerAcq interface
     .SwerAcqActive(swerAcqActive),
     .SwerAcqPackBus(swerAcqPackBus),
     .GfdsAcqActive(gfdsAcqActive),

     // swerSpin interface
     .Data0({
`ifdef XXXXXX_F_SHRINK_C_PATH
                 swerSpinData0ChC_noConnect,
`else
                 swerSpinData0ChC,
`endif
`ifdef XXXXXX_F_SHRINK
                 swerSpinData0ChB_noConnect,
`else
                 swerSpinData0ChB,
`endif
                 swerSpinData0ChA
                 }),
     .Data0Valid({
`ifdef XXXXXX_F_SHRINK_C_PATH
                 swerSpinData0ChCValid_noConnect,
`else
                 swerSpinData0ChCValid,
`endif
`ifdef XXXXXX_F_SHRINK
                 swerSpinData0ChBValid_noConnect,
`else
                 swerSpinData0ChBValid,
`endif
                 swerSpinData0ChAValid
                 }),
     .Data1({
`ifdef XXXXXX_F_SHRINK_C_PATH
                 swerSpinData1ChC_noConnect,
`else
                 swerSpinData1ChC,
`endif
`ifdef XXXXXX_F_SHRINK
                 swerSpinData1ChB_noConnect,
`else
                 swerSpinData1ChB,
`endif
                 swerSpinData1ChA
                 }),
     .Data1Valid({
`ifdef XXXXXX_F_SHRINK_C_PATH
                 swerSpinData1ChCValid_noConnect,
`else
                 swerSpinData1ChCValid,
`endif
`ifdef XXXXXX_F_SHRINK
                 swerSpinData1ChBValid_noConnect,
`else
                 swerSpinData1ChBValid,
`endif
                 swerSpinData1ChAValid
                 }),
     .SwerSpinPop(swerSpinSwerSpinPop),
     .SwerSpinActive(swerSpinActive),
     .GfdsSpinPop(gfdsSpinGfdsSpinPop),
     .GfdsSpinActive(gfdsSpinActive),


     // inst                       
     .PopPackMnbvcdInst(devInst[`VE_SYS_INST_TREPACKMNBVCD_ID]),

     // clocks and resets          
     .SysClk(SysClk),
     .SysReset_n(SysReset_n),

     // scan
     .ScanIn(1'b0),
     .ScanTest(scanTest),
     .ScanEn_n(scanEn_n)
);


// ---------------------------------------------------------------------------
// swerSpin
// ---------------------------------------------------------------------------
// interface to trePackMnbvcd
wire [`NumSwers*`SwerPackBus_W-1:0]   swerTyuiPackBus;
wire [`NumSwers*`SwerIolCfg_W-1:0]    swerTyuiIolCfg;
wire [`NumSwers*`SwerIolStatus_W-1:0] swerTyuiIolStatus;
wire swerTyuiGlobalEn = 1'b1;

`ifdef XXXXXX_F_SHRINK
wire [`RegRdData_W-1:0] swerTyuiChBRegRdData_noConnect;
assign regRdData[`RegData_W*`RegSwerTyuiChBId +: `RegData_W] = {`RegRdData_W{1'b0}};
`endif
`ifdef XXXXXX_F_SHRINK_C_PATH
wire [`RegRdData_W-1:0] swerTyuiChCRegRdData_noConnect;
assign regRdData[`RegData_W*`RegSwerTyuiChCId +: `RegData_W] = {`RegRdData_W{1'b0}};
`endif
//YYYYY

swerTop
  swerTyui [`NumSwers-1:0] (
    `ifndef SYNTHESIS
    `ifdef SIM_CODE
      .Reg_if(SwerTyuiRegXactAdapter_if),
    `endif
    `endif

`ifdef XXXXXX_F_SHRINK_HARD_CODED_2CH_SWERS
  .ImplementAnalog(3'b001),
  .ImplementDigital(3'b100),
`else
  .ImplementAnalog(3'b111),
  .ImplementDigital(3'b111),
`endif

     // lvcxz side reg interface
     .RegRdData({
`ifdef XXXXXX_F_SHRINK_C_PATH
                 swerTyuiChCRegRdData_noConnect,
`else
                 regRdData[`RegData_W*`RegSwerTyuiChCId +: `RegData_W],
`endif
`ifdef XXXXXX_F_SHRINK
                 swerTyuiChBRegRdData_noConnect,
`else
                 regRdData[`RegData_W*`RegSwerTyuiChBId +: `RegData_W],
`endif
                 regRdData[`RegData_W*`RegSwerTyuiChAId +: `RegData_W]
                 }),
     .RegRd({
                 regRd[`RegSwerTyuiChCId],
                 regRd[`RegSwerTyuiChBId],
                 regRd[`RegSwerTyuiChAId]
                 }),
     .RegRdAddr(regRdAddr),
     .RegWr({
                 regWr[`RegSwerTyuiChCId],
                 regWr[`RegSwerTyuiChBId],
                 regWr[`RegSwerTyuiChAId]
                 }),
     .RegWrAddr(regWrAddr),
     .RegWrData(regWrData),
 
     // swerPop, swerVcxzm iol interfaces
     .SwerActive(swerTyuiActive),
     .SwerPackBus(swerTyuiPackBus),
     .SwerIolCfg(swerTyuiIolCfg),
     .SwerIolStatus(swerTyuiIolStatus),

     // run signal
     .SwerRun(tyuiRun),

     // data pipe input cntrl
     .SwerTyuiPop(swerTyuiSwerTyuiPop),
     .GlobalEn(swerTyuiGlobalEn),

     // data0 input stream
     .Data0({
                 swerTyuiData0ChC,
                 swerTyuiData0ChB,
                 swerTyuiData0ChA
                 }),
     .Data0Valid({
                 swerTyuiData0ChCValid,
                 swerTyuiData0ChBValid,
                 swerTyuiData0ChAValid
                 }),

     // data1 input stream
     .Data1({
                 swerTyuiData1ChC,
                 swerTyuiData1ChB,
                 swerTyuiData1ChA
                 }),
     .Data1Valid({
                 swerTyuiData1ChCValid,
                 swerTyuiData1ChBValid,
                 swerTyuiData1ChAValid
                 }),

     // data2 input stream (gfds diagnostics)
     .Data2({
                 gfdsToSwerTyuiChC,
                 gfdsToSwerTyuiChB,
                 gfdsToSwerTyuiChA
                 }),
     .Data2Valid({
                 gfdsToSwerTyuiChCValid,
                 gfdsToSwerTyuiChBValid,
                 gfdsToSwerTyuiChAValid
                 }),

     // sys interface 
     .SwerIntEventSlowQwer({
                 devIntEventSlowQwer[`VE_QWER_INT_SLOW_SWER_TYUI_CHC_ID],
                 devIntEventSlowQwer[`VE_QWER_INT_SLOW_SWER_TYUI_CHB_ID],
                 devIntEventSlowQwer[`VE_QWER_INT_SLOW_SWER_TYUI_CHA_ID]
                 }),
     .SwerIntEventSlowMpc({
                 devIntEventSlowMpc[`VE_QWER_INT_SLOW_SWER_TYUI_CHC_ID],
                 devIntEventSlowMpc[`VE_QWER_INT_SLOW_SWER_TYUI_CHB_ID],
                 devIntEventSlowMpc[`VE_QWER_INT_SLOW_SWER_TYUI_CHA_ID]
                 }),
     .SwerIntEventFastQwer0({
                 devIntEventFastQwer[`VE_QWER_INT_SWER_TYUI_CHC_FAST_QWER0_ID],
                 devIntEventFastQwer[`VE_QWER_INT_SWER_TYUI_CHB_FAST_QWER0_ID],
                 devIntEventFastQwer[`VE_QWER_INT_SWER_TYUI_CHA_FAST_QWER0_ID]
                 }),

      // InstId
     .SwerInst({
                 devInst[`VE_SYS_INST_SWER_TYUI_CHC_ID],
                 devInst[`VE_SYS_INST_SWER_TYUI_CHB_ID],
                 devInst[`VE_SYS_INST_SWER_TYUI_CHA_ID]
                 }),

     // clocks and resets
     .SysClk(SysClk),
     .SysReset_n(SysReset_n),

     // scan
     .ScanIn(1'b0),
     .ScanTest(scanTest),
     .ScanEn_n(scanEn_n)
);


// -----------------------------------------------------------------------
// swerVcxzm Iolory interface 
// ---------------------------------------------------------------------------
swerVcxzmIolIf
  swerVcxzmIolIf_inst [`NumVcxzmIols-1:0] (

     // Swer to vcxzmIol interface
     .VcxzmIolReq(vcxzmIolSwerReq),
     .VcxzmIolWrEn(vcxzmIolSwerWrEn),
     .VcxzmIolAddr(vcxzmIolSwerAddr),
     .VcxzmIolWrData(vcxzmIolSwerWrData),
     .VcxzmIolByteWr(vcxzmIolSwerByteWr),
     .VcxzmIolAck(vcxzmIolSwerAck),
     .VcxzmIolRdData(vcxzmIolSwerRdData),
     .VcxzmIolRdDataAck(vcxzmIolSwerRdDataAck),

     // clocks and resets
     .SysClk(SysClk),
     .SysReset_n(SysReset_n),

     // signals from swermators
     .SwerPackBus(swerTyuiPackBus),
     .SwerIolCfg(swerTyuiIolCfg),
     .SwerIolStatus(swerTyuiIolStatus),

     // scan
     .ScanIn(1'b0),
     .ScanTest(scanTest),
     .ScanEn_n(scanEn_n)
);

// ---------------------------------------------------------------------------
// vcxzm Iols 
// ---------------------------------------------------------------------------
vcxzmIolTop
  vcxzmIol [`NumVcxzmIols-1:0] 
    (
     // swer port
`ifdef XXXXXX_F_SHRINK
     .VcxzmIolAck(vcxzmIolSwerAck_partialConnect),
     .VcxzmIolRdData(vcxzmIolSwerRdData_partialConnect),
     .VcxzmIolRdDataAck(vcxzmIolSwerRdDataAck_partialConnect),
`else
     .VcxzmIolAck(vcxzmIolSwerAck),
     .VcxzmIolRdData(vcxzmIolSwerRdData),
     .VcxzmIolRdDataAck(vcxzmIolSwerRdDataAck),
`endif
     .VcxzmIolReq(vcxzmIolSwerReq),
     .VcxzmIolWrEn(vcxzmIolSwerWrEn),
     .VcxzmIolAddr(vcxzmIolSwerAddr),
     .VcxzmIolWrData(vcxzmIolSwerWrData),
     .VcxzmIolByteWr(vcxzmIolSwerByteWr),

     // device Port
`ifdef XXXXXX_F_SHRINK
     .VcxzmIolDevAck(vcxzmIolDevAck_partialConnect),
     .VcxzmIolDevRdData(vcxzmIolDevRdData_partialConnect),
     .VcxzmIolDevRdDataAck(vcxzmIolDevRdDataAck_partialConnect),
`else
     .VcxzmIolDevAck(vcxzmIolDevAck),
     .VcxzmIolDevRdData(vcxzmIolDevRdData),
     .VcxzmIolDevRdDataAck(vcxzmIolDevRdDataAck),
`endif
     .VcxzmIolDevReq(vcxzmIolDevReq),
     .VcxzmIolDevWrEn(vcxzmIolDevWrEn),
     .VcxzmIolDevAddr(vcxzmIolDevAddr),
     .VcxzmIolDevWrData(vcxzmIolDevWrData),
     .VcxzmIolDevByteWr(vcxzmIolDevByteWr),

     .SysClk(SysClk),
     .SysReset_n(SysReset_n),

     .ScanIn(1'b0),
     .ScanTest(scanTest),
     .ScanEn_n(scanEn_n)
);


// ---------------------------------------------------------------------------
// gfdsList Iols 
// ---------------------------------------------------------------------------
gfdsListIolTop
  gfdsListIol
    (
     // swer port
     .GfdsListIolAck(gfdsListIolAck),
     .GfdsListIolRdData(gfdsListIolRdData),
     .GfdsListIolRdDataAck(gfdsListIolRdDataAck),
     .GfdsListIolReq(gfdsListIolReq),
     .GfdsListIolWrEn(gfdsListIolWrEn),
     .GfdsListIolAddr(gfdsListIolAddr),
     .GfdsListIolWrData(gfdsListIolWrData),
     .GfdsListIolByteWr(gfdsListIolByteWr),

     // device Port
     .GfdsListIolDevAck(gfdsListIolDevAck),
     .GfdsListIolDevRdData(gfdsListIolDevRdData),
     .GfdsListIolDevRdDataAck(gfdsListIolDevRdDataAck),
     .GfdsListIolDevReq(gfdsListIolDevReq),
     .GfdsListIolDevWrEn(gfdsListIolDevWrEn),
     .GfdsListIolDevAddr(gfdsListIolDevAddr),
     .GfdsListIolDevWrData(gfdsListIolDevWrData),
     .GfdsListIolDevByteWr(gfdsListIolDevByteWr),

     .SysClk(SysClk),
     .SysReset_n(SysReset_n),

     .ScanIn(1'b0),
     .ScanTest(scanTest),
     .ScanEn_n(scanEn_n)
);

// ---------------------------------------------------------------------------
// rast
// ---------------------------------------------------------------------------
rastTop rast (
    `ifndef SYNTHESIS
    `ifdef SIM_CODE
      .Reg_if(RastRegXactAdapter_if),
    `endif
    `endif

  .RastActive(devActive[`VE_SYS_START_RAST_ID]),
  .StartRast(devStart[`VE_SYS_START_RAST_ID]),
  .RastIntEventSlowQwer(devIntEventSlowQwer[`VE_QWER_INT_SLOW_RAST_ID]),
  .RastIntEventSlowMpc(devIntEventSlowMpc[`VE_QWER_INT_SLOW_RAST_ID]),
  .RastIntEventFastQwer0(devIntEventFastQwer[`VE_QWER_INT_RAST_FAST_QWER0_ID]),

  // lvcxz side reg interface
  .RegRdData(regRdData[`RegData_W*`RegRastId +: `RegData_W]),
  .RegRd(regRd[`RegRastId]),
  .RegRdAddr(regRdAddr),
  .RegWr(regWr[`RegRastId]),
  .RegWrAddr(regWrAddr),
  .RegWrData(regWrData),

  // Rast Iol Rasterizer Port I/F
  .RtyuPopRastReq(rastIolRastReq),
  .RtyuPopRastWrData(rastIolRastWrData),
  .RtyuPopRastWrEn(rastIolRastWrEn),
  .RtyuPopRastAddr(rastIolRastAddr),
  .RtyuPopRastAck(rastIolRastAck),
  .RtyuPopRastRdData(rastIolRastRdData),
  .RtyuPopRastRdDataAck(rastIolRastRdDataAck),

  // Vcxzm Iol Dev port I/F
  // All vcxzmIol busses are (from the lsbs up):
  //  user {Rast, Qwer, Mpc}
  //    Vcxzm iolory number
  // Verilog sucks!  Too bad I have to get the correct number of vcxzm iolories by hand.  sigh.
  // need to connect to `NumVcxzmIols-1:0
  .VcxzmIolRastAck( {
      vcxzmIolDevAck[2*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevAck[1*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevAck[0*`VcxzmIolDevs+`VcxzmIolRastId]
      }),
  .VcxzmIolRastRdData( { 
      vcxzmIolDevRdData[2*`VcxzmIolData_W +: `VcxzmIolData_W],
      vcxzmIolDevRdData[1*`VcxzmIolData_W +: `VcxzmIolData_W],
      vcxzmIolDevRdData[0*`VcxzmIolData_W +: `VcxzmIolData_W]
      }),
  .VcxzmIolRastRdDataAck( { 
      vcxzmIolDevRdDataAck[2*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevRdDataAck[1*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevRdDataAck[0*`VcxzmIolDevs+`VcxzmIolRastId]
      }),
  .VcxzmIolRastReq( { 
      vcxzmIolDevReq[2*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevReq[1*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevReq[0*`VcxzmIolDevs+`VcxzmIolRastId]
      }),
  .VcxzmIolRastAddr( { 
      vcxzmIolDevAddr[(2*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolAddr_W +: `VcxzmIolAddr_W],
      vcxzmIolDevAddr[(1*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolAddr_W +: `VcxzmIolAddr_W],
      vcxzmIolDevAddr[(0*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolAddr_W +: `VcxzmIolAddr_W]
      }),
  .VcxzmIolRastWrEn( { 
      vcxzmIolDevWrEn[2*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevWrEn[1*`VcxzmIolDevs+`VcxzmIolRastId],
      vcxzmIolDevWrEn[0*`VcxzmIolDevs+`VcxzmIolRastId]
      }),
  .VcxzmIolRastWrData( { 
      vcxzmIolDevWrData[(2*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolData_W +: `VcxzmIolData_W],
      vcxzmIolDevWrData[(1*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolData_W +: `VcxzmIolData_W],
      vcxzmIolDevWrData[(0*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolData_W +: `VcxzmIolData_W] 
      }),
  .VcxzmIolRastByteWr( { 
      vcxzmIolDevByteWr[(2*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolByteWr_W +: `VcxzmIolByteWr_W],
      vcxzmIolDevByteWr[(1*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolByteWr_W +: `VcxzmIolByteWr_W],
      vcxzmIolDevByteWr[(0*`VcxzmIolDevs+`VcxzmIolRastId)*`VcxzmIolByteWr_W +: `VcxzmIolByteWr_W]
      }),

  // clocks and resets 
  .SysClk(SysClk),
  .Reset_n(intReset_n),
  .SysReset_n(SysReset_n),


  // InstId
  .RastInst(devInst[`VE_SYS_INST_RAST_ID]),

  // scan
  .ScanIn(1'b0),
  .ScanTest(scanTest),
  .ScanEn_n(scanEn_n)
);


// ---------------------------------------------------------------------------
// rastIol 
// ---------------------------------------------------------------------------
rastIolTop rastIol (
  // Rast Iol Rasterizer Port I/F
  .RIolRastAck(rastIolRastAck),
  .RIolRastRdData(rastIolRastRdData),
  .RIolRastRdDataAck(rastIolRastRdDataAck),
  .RIolRastReq(rastIolRastReq),
  .RIolRastWrData(rastIolRastWrData),
  .RIolRastWrEn(rastIolRastWrEn),
  .RIolRastAddr(rastIolRastAddr),

  // Rast Iol Device Port I/F
  .RIolDevAck(rastIolDevAck),
  .RIolDevRdData(rastIolDevRdData),
  .RIolDevRdDataAck(rastIolDevRdDataAck),
  .RIolDevReq(rastIolDevReq),
  .RIolDevWrData(rastIolDevWrData),
  .RIolDevWrEn(rastIolDevWrEn),
  .RIolDevAddr(rastIolDevAddr),

  // clocks and resets 
  .SysClk(SysClk),
  .SysReset_n(SysReset_n),

  // scan
  .ScanIn(1'b0),
  .ScanTest(scanTest),
  .ScanEn_n(scanEn_n)
);

// ---------------------------------------------------------------------------
// map / decay / fuzz 
// ---------------------------------------------------------------------------
mapTop map (
    `ifndef SYNTHESIS
    `ifdef SIM_CODE
      .Reg_if(MapRegXactAdapter_if),
    `endif
    `endif

  // lvcxz side reg interface
  .RegRdData(regRdData[`RegData_W*`RegMapId +: `RegData_W]),
  .RegRd(regRd[`RegMapId]),
  .RegRdAddr(regRdAddr),
  .RegWr(regWr[`RegMapId]),
  .RegWrAddr(regWrAddr),
  .RegWrData(regWrData),

  // iol interface
  .IolReq(hostIolReq[`HostIolMapId]),
  .IolBurst(hostIolBurst[`HostIolBurst_W*`HostIolMapId +: `HostIolBurst_W]),
  .IolWrEn(hostIolWrEn[`HostIolMapId]),
  .IolAddr(hostIolAddr[`HostIolAddr_W*`HostIolMapId +: `HostIolAddr_W]),
  .IolWrData(hostIolWrData[`HostIolData_W*`HostIolMapId +: `HostIolData_W]),
  .IolByteWr(hostIolByteWr[`HostIolByteWr_W*`HostIolMapId +: `HostIolByteWr_W]),
  .IolAck(hostIolAck[`HostIolMapId]),
  .IolRdData(hostIolRdData),
  .IolRdDataAck(hostIolRdDataAck[`HostIolMapId]),

  // Rast Iol Device Port I/F
  .RtyuPopReq(rastIolDevReq[`RtyuPopMapId]),
  .RtyuPopWrData(rastIolDevWrData[`RtyuPopMapId*`RtyuPopDevData_W+:`RtyuPopDevData_W]),
  .RtyuPopWrEn(rastIolDevWrEn[`RtyuPopMapId]),
  .RtyuPopAddr(rastIolDevAddr[`RtyuPopMapId*`RtyuPopDevAddr_W+:`RtyuPopDevAddr_W]),
  .RtyuPopAck(rastIolDevAck[`RtyuPopMapId]),
  .RtyuPopRdData(rastIolDevRdData),
  .RtyuPopRdDataAck(rastIolDevRdDataAck[`RtyuPopMapId]),

  // clocks and resets 
  .SysClk(SysClk),
  .SysReset_n(SysReset_n),

  // sys interface
  .MapIntEventSlowQwer(devIntEventSlowQwer[`VE_QWER_INT_SLOW_MAP_ID]),
  .MapIntEventSlowMpc (devIntEventSlowMpc[`VE_QWER_INT_SLOW_MAP_ID]),
  .MapIntEventFastQwer0(devIntEventFastQwer[`VE_QWER_INT_MAP_FAST_QWER0_ID]),
  .StartMap(devStart[`VE_SYS_START_MAP_ID]),
  .MapActive(devActive[`VE_SYS_START_MAP_ID]),

  // InstId
  .MapInst(devInst[`VE_SYS_INST_MAP_ID]),

  // scan
  .ScanIn(1'b0),
  .ScanTest(scanTest),
  .ScanEn_n(scanEn_n)
);


// ---------------------------------------------------------------------------
// disp 
// ---------------------------------------------------------------------------
dispTop disp (
    `ifndef SYNTHESIS
    `ifdef SIM_CODE
      .Reg_if(PdsfRegXactAdapter_if),
    `endif
    `endif

  // Output RGB Pins
  .PdsfOutColorR(PdsfOutColorR),
  .PdsfOutColorG(PdsfOutColorG),
  .PdsfOutColorB(PdsfOutColorB),

  // Pdsflay Device Control Pins
  .PdsfOutHSyncHSP(PdsfOutHSyncHSP),
  .PdsfOutVSyncVSP(PdsfOutVSyncVSP),
  .PdsfOutDataEnINH(PdsfOutDataEnINH),
  .PdsfOutPdsfClkHCK(PdsfOutPdsfClkHCK),
  .PdsfOutHRESET(PdsfOutHRESET),
  .PdsfOutVCK(PdsfOutVCK),
  .PdsfOutVRESET(PdsfOutVRESET),
  .PdsfOutVCOM(PdsfOutVCOM),
  .PdsfOutVOE(PdsfOutVOE),
  .PdsfOutPowerEn_n(PdsfOutPowerEn_n),

  // GW Addition: Pdsflay Lvcxz Select
  .PdsfLvcxz_n(PdsfLvcxz_n),

  // lvcxz side reg interface
  .RegRdData(regRdData[`RegData_W*`RegPdsfId +: `RegData_W]),
  .RegRd(regRd[`RegPdsfId]),
  .RegRdAddr(regRdAddr),
  .RegWr(regWr[`RegPdsfId]),
  .RegWrAddr(regWrAddr),
  .RegWrData(regWrData),

  // iol interface
  .IolReq(hostIolReq[`HostIolPdsfId]),
  .IolBurst(hostIolBurst[`HostIolBurst_W*`HostIolPdsfId +: `HostIolBurst_W]),
  .IolWrEn(hostIolWrEn[`HostIolPdsfId]),
  .IolAddr(hostIolAddr[`HostIolAddr_W*`HostIolPdsfId +: `HostIolAddr_W]),
  .IolWrData(hostIolWrData[`HostIolData_W*`HostIolPdsfId +: `HostIolData_W]),
  .IolByteWr(hostIolByteWr[`HostIolByteWr_W*`HostIolPdsfId +: `HostIolByteWr_W]),
  .IolAck(hostIolAck[`HostIolPdsfId]),
  .IolRdData(hostIolRdData),
  .IolRdDataAck(hostIolRdDataAck[`HostIolPdsfId]),

  // clocks and resets 
  .SysClk(SysClk),
  .Reset_n(intReset_n),
  .SysReset_n(SysReset_n),
  .SoftResetChip_v(softResetChip_v),

  // sys interface
  .PdsfIntEventSlowQwer(devIntEventSlowQwer[`VE_QWER_INT_SLOW_DISP_ID]),
  .PdsfIntEventSlowMpc (devIntEventSlowMpc [`VE_QWER_INT_SLOW_DISP_ID]),
  .PdsfIntEventFastQwer0(devIntEventFastQwer[`VE_QWER_INT_DISP_FAST_QWER0_ID]),
  .PdsfIntEventFastQwer1(devIntEventFastQwer[`VE_QWER_INT_DISP_FAST_QWER1_ID]),
  .PdsfIntEventFastQwer2(devIntEventFastQwer[`VE_QWER_INT_DISP_FAST_QWER2_ID]),
  .StartPdsf(devStart[`VE_SYS_START_DISP_ID]),
  .PdsfActive(devActive[`VE_SYS_START_DISP_ID]),

  // InstId
  .PdsfInst(devInst[`VE_SYS_INST_DISP_ID]),

  // Lvcxz Wpt I/F
  .LvcxzWptFrameSync(LvcxzWptFrameSync),
  .LvcxzWptReady(LvcxzWptReady),
  .LvcxzWptData(LvcxzWptData),
  .LvcxzWptByteSync(LvcxzWptByteSync),
  .LvcxzWptClk(LvcxzWptClk),

  // scan
  .ScanIn(1'b0),
  .ScanTest(scanTest),
  .ScanEn_n(scanEn_n)
);



endmodule
#############################################################################


In GNU Emacs 22.2.1 (i686-pc-linux-gnu, X toolkit, Xaw3d scroll bars)
 of 2008-07-07 on zephyr
Windowing system distributor `The X.Org Foundation', version 11.0.60802000
configured using `configure  '--prefix=/tools/wdtgnu/emacs-22.2' '--disable-nls''

Important settings:
  value of $LC_ALL: nil
  value of $LC_COLLATE: C
  value of $LC_CTYPE: nil
  value of $LC_MESSAGES: nil
  value of $LC_MONETARY: nil
  value of $LC_NUMERIC: nil
  value of $LC_TIME: nil
  value of $LANG: C
  locale-coding-system: nil
  default-enable-multibyte-characters: t

Major mode: Verilog

Minor modes in effect:
  tooltip-mode: t
  tool-bar-mode: t
  mouse-wheel-mode: t
  menu-bar-mode: t
  file-name-shadow-mode: t
  global-font-lock-mode: t
  font-lock-mode: t
  blink-cursor-mode: t
  unify-8859-on-encoding-mode: t
  utf-translate-cjk-mode: t
  auto-compression-mode: t
  line-number-mode: t

Recent input:
<escape> x e m a c s - b <return> <backspace> <tab> 
<backspace> <backspace> <backspace> <backspace> <backspace> 
<backspace> r e p <tab> o <tab> r <tab> <return>

Recent messages:
For information about GNU Emacs and the GNU system, type C-h C-a.
Loading verilog-mode...
Loading easymenu...done
Loading verilog-mode...done
Making completion list...
Loading help-mode...done
Making completion list... [2 times]
Loading emacsbug...
Loading regexp-opt...done
Loading emacsbug...done

Message #10 received at submit <at> emacsbugs.donarmstrong.com (full text, mbox):

From: Michael McNamara <mac <at> brushroad.com>
To: bug-gnu-emacs <at> gnu.org
Subject: Re: bug#995: large verilog file hangs hilighting
Date: Thu, 18 Sep 2008 15:17:01 +0000 (UTC)

Warren L Dodge <warrend <at> Tektronix.com> writes:

> 
> emacs-22.2 -Q xxx.rtl.v &
> M-> (end-of-buffer)
> 
> This takes quite a while to do on the enclosed data which I greating
> reduced in size for the report. With th eoriginal file emacs would
> become unresponsive for a very long time. The user would kill it to
> exit this condition.
> 

Thanks for the report, I am looking at it.

CC'ing the address mac <at> verilog.com will expedite my seeing bug reports; or
typing  C-c C-b in a buffer that is in verilog-mode will gather the data needed
on the issue and format an email bug report to those of us who support this mode.

-mac

Message #17 received at 995-done <at> debbugs.gnu.org (full text, mbox):

From: Glenn Morris <rgm <at> gnu.org>
To: 995-done <at> debbugs.gnu.org
Subject: Re: bug#995: large verilog file hangs hilighting
Date: Tue, 04 Oct 2011 15:10:12 -0400

Warren L Dodge wrote:

> Look for the entire first instance of trePackMnbvcdTop
> from //XXXXX to //YYYYY
>
> Copy it into the cut-buffer.
>
> Paste it with c-y 5 times rapidly. emacs will hang with this.

I can somewhat reproduce this in Emacs 22.2, but it seems to be much
better in Emacs 23.3, so I am closing this.

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