GNU bug report logs - #74242
[PATCH] gnu: Add python-vunit.

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Message #13 received at 74242-done <at> debbugs.gnu.org (full text, mbox):

From: Ludovic Courtès <ludo <at> gnu.org>
To: Cayetano Santos <csantosb <at> inventati.org>
Cc: 74242-done <at> debbugs.gnu.org
Subject: Re: [bug#74242] [PATCH v1] gnu: Add python-vunit.
Date: Tue, 07 Jan 2025 18:58:11 +0100

[Message part 1 (text/plain, inline)]

Hello,

Cayetano Santos <csantosb <at> inventati.org> skribis:

> * gnu/packages/fpga.scm (python-vunit): New variable.
>
> Change-Id: Ieb16ec16928e6b0b2af6992fd9566cb946990dad

Finally applied, with the changes below.

Thanks!

Ludo’.

[Message part 2 (text/x-patch, inline)]

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 5c3faf2c94..9116a4f151 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -537,12 +537,16 @@ (define-public python-vunit
         (base32 "0s7j5bykbv34wgnxy5cl4zp6g0caidvzs8pd9yxjq341543xkjwm"))))
     (build-system python-build-system)
     (arguments
-     '(#:tests? #f)) ;requires setuptools_scm >= 2.0.0, <3
+     '(#:tests? #f))                ;XXX: requires setuptools_scm >= 2.0.0, <3
     (propagated-inputs (list python python-colorama))
     (home-page "https://vunit.github.io")
-    (synopsis "Open source unit testing framework for VHDL/SystemVerilog")
+    (synopsis "Unit testing framework for VHDL/SystemVerilog")
     (description
-     "VUnit features the functionality needed to realize continuous and automated testing of HDL code.")
+     "VUnit features the functionality needed to realize continuous and
+automated testing of HDL code.")
+
+    ;; According to 'LICENSE.rst', VUnit itself is under MPL but two
+    ;; subdirectories are under ASL.
     (license (list license:mpl2.0 license:asl2.0))))
 
 (define-public nvc

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