GNU bug report logs - #56353
sbcl-2.2.6 build fail

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Message #20 received at 56353 <at> debbugs.gnu.org (full text, mbox):

From: Christopher Baines <mail <at> cbaines.net>
To: Guillaume Le Vaillant <glv <at> posteo.net>
Cc: Tobias Geerinckx-Rice <me <at> tobias.gr>, 56353 <at> debbugs.gnu.org
Subject: Re: bug#56353: sbcl-2.2.6 build fail
Date: Sat, 02 Jul 2022 20:26:40 +0100

[Message part 1 (text/plain, inline)]

Guillaume Le Vaillant <glv <at> posteo.net> writes:

> [[PGP Signed Part:Undecided]]
> Christopher Baines <mail <at> cbaines.net> skribis:
>
>> Tobias Geerinckx-Rice via Bug reports for GNU Guix <bug-guix <at> gnu.org> writes:
>>
>>> On 2 July 2022 09:29:22 UTC, Wensheng Xie <xiewensheng <at> hotmail.com> wrote:
>>>>Das Erstellungsprotokoll kann unter „/var/log/guix/drvs/6l/q7dfdfzrlp24lmhj95fcnvkr2mrqfz-sbcl-2.2.6.drv.bz2“ eingesehen werden.
>>>
>>>
>>> This log file is always a good idea to include.
>>
>> I think this is the equivalent non-grafted derivation:
>>
>>   https://data.guix.gnu.org/gnu/store/m7xw777v5agldb76gbqkqdvrrlj5d7zy-sbcl-2.2.6.drv
>>
>> There are plenty of failed builds on bordeaux.guix.gnu.org. I managed to
>> get it to build successfully once though on my laptop.
>>
>> Guillaume, any ideas if sbcl <at> 2.2.6 is just really unlikely to build
>> successfully, or if there's particular conditions for it to build?
>>
>> Thanks,
>>
>> Chris
>
> According to the logs, the 'build-doc' phase fails to compile the
> documentation for SIMD related functions. There's a patch disabling this
> part of the doc unless we compile on x86_64, but maybe not all x86_64
> CPUs have the required instructions...
>
> Would it be possible to get the result of "lscpu" on some machines where
> it fails?

Sure, here is the lscpu output from the bayfront and harbourfront
machines.

[bayfront.lscpu (text/plain, inline)]

Architecture:            x86_64
  CPU op-mode(s):        32-bit, 64-bit
  Address sizes:         48 bits physical, 48 bits virtual
  Byte Order:            Little Endian
CPU(s):                  32
  On-line CPU(s) list:   0-31
Vendor ID:               AuthenticAMD
  Model name:            AMD Opteron(tm) Processor 6278
    CPU family:          21
    Model:               1
    Thread(s) per core:  2
    Core(s) per socket:  8
    Socket(s):           2
    Stepping:            2
    Frequency boost:     enabled
    CPU max MHz:         2400.0000
    CPU min MHz:         1400.0000
    BogoMIPS:            4799.96
    Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_go
                         od nopl nonstop_tsc cpuid extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 cx16 sse4_1 sse4_2 popcnt aes xsave avx lahf_lm cmp_legacy svm extapic cr8_legac
                         y abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 topoext perfctr_core perfctr_nb cpb hw_pstate ssbd vmmcall arat npt lbrv svm_lock nrip_save ts
                         c_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold
Virtualization features: 
  Virtualization:        AMD-V
Caches (sum of all):     
  L1d:                   512 KiB (32 instances)
  L1i:                   1 MiB (16 instances)
  L2:                    32 MiB (16 instances)
  L3:                    24 MiB (4 instances)
NUMA:                    
  NUMA node(s):          4
  NUMA node0 CPU(s):     0-7
  NUMA node1 CPU(s):     8-15
  NUMA node2 CPU(s):     16-23
  NUMA node3 CPU(s):     24-31
Vulnerabilities:         
  Itlb multihit:         Not affected
  L1tf:                  Not affected
  Mds:                   Not affected
  Meltdown:              Not affected
  Spec store bypass:     Mitigation; Speculative Store Bypass disabled via prctl and seccomp
  Spectre v1:            Mitigation; usercopy/swapgs barriers and __user pointer sanitization
  Spectre v2:            Mitigation; Full AMD retpoline, STIBP disabled, RSB filling
  Srbds:                 Not affected
  Tsx async abort:       Not affected

[harbourfront.lscpu (text/plain, inline)]

Architecture:           x86_64
  CPU op-mode(s):       32-bit, 64-bit
  Address sizes:        38 bits physical, 48 bits virtual
  Byte Order:           Little Endian
CPU(s):                 8
  On-line CPU(s) list:  0-7
Vendor ID:              GenuineIntel
  Model name:           Intel(R) Xeon(R) CPU           E5420  @ 2.50GHz
    CPU family:         6
    Model:              23
    Thread(s) per core: 1
    Core(s) per socket: 4
    Socket(s):          2
    Stepping:           10
    BogoMIPS:           4987.55
    Flags:              fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts 
                        rep_good nopl cpuid aperfmperf pni dtes64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 xsave lahf_lm pti dtherm
Caches (sum of all):    
  L1d:                  256 KiB (8 instances)
  L1i:                  256 KiB (8 instances)
  L2:                   24 MiB (4 instances)
NUMA:                   
  NUMA node(s):         1
  NUMA node0 CPU(s):    0-7
Vulnerabilities:        
  Itlb multihit:        KVM: Mitigation: VMX unsupported
  L1tf:                 Mitigation; PTE Inversion
  Mds:                  Vulnerable: Clear CPU buffers attempted, no microcode; SMT disabled
  Meltdown:             Mitigation; PTI
  Spec store bypass:    Vulnerable
  Spectre v1:           Mitigation; usercopy/swapgs barriers and __user pointer sanitization
  Spectre v2:           Mitigation; Full generic retpoline, STIBP disabled, RSB filling
  Srbds:                Not affected
  Tsx async abort:      Not affected

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