GNU bug report logs - #39456
[PATCH core-updates 0/6] glibc & binutils update

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Message #5 received at submit <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: guix-patches <at> gnu.org
Subject: [PATCH core-updates 0/6] glibc & binutils update
Date: Thu,  6 Feb 2020 18:59:55 +0100

These patches update Binutils and Glibc to the latest versions, as well as
Linux-Libre headers (I will change from 5.4.16 to 5.4.18 or whatever is
current before pushing).

Glibc 2.31 required patching every GCC version due to a size change that
trips libsanitizer.  It also requires patching older glibc versions due to
an unrelated change, but I'm not sure what the correct fix is.  Try
building glibc-locales <at> 2.29 with these patches to join the quest.

The GCC patches were pretty tricky, and unfortunately required small tweaks
between each version.  I would prefer if someone else tried cherry-picking
the relevant upstream commits to an older GCC and see if they get the same
result I did.  See the patch files for URLs.

Marius Bakke (6):
  gnu: linux-libre-headers: Update to 5.4.16.
  gnu: dnsmasq: Fix build with linux-libre-headers >= 5.2.
  gnu: binutils: Update to 2.34.
  gnu: cross-binutils: Fix xtensa build with Binutils 2.34.
  gnu: glibc: Update to 2.31.
  gnu: libfaketime: Fix build with glibc 2.31.

 gnu/local.mk                                  |    7 +
 gnu/packages/base.scm                         |   55 +-
 gnu/packages/check.scm                        |    4 +
 gnu/packages/commencement.scm                 |   15 +-
 gnu/packages/cross-base.scm                   |   15 +-
 gnu/packages/dns.scm                          |   14 +-
 gnu/packages/gcc.scm                          |    6 +
 gnu/packages/linux.scm                        |    8 +-
 .../binutils-revert-xtensa-shift.patch        | 4091 +++++++++++++++++
 .../gcc-4.9-libsanitizer-mode-size.patch      |   52 +
 .../gcc-6-libsanitizer-mode-size.patch        |   53 +
 .../gcc-7-libsanitizer-mode-size.patch        |   53 +
 .../gcc-8-libsanitizer-mode-size.patch        |   56 +
 .../gcc-9-libsanitizer-mode-size.patch        |   58 +
 .../glibc-2.29-supported-locales.patch        |   33 +
 .../patches/glibc-supported-locales.patch     |   11 +-
 16 files changed, 4503 insertions(+), 28 deletions(-)
 create mode 100644 gnu/packages/patches/binutils-revert-xtensa-shift.patch
 create mode 100644 gnu/packages/patches/gcc-4.9-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-6-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-7-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-8-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-9-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/glibc-2.29-supported-locales.patch

-- 
2.25.0

Message #8 received at 39456 <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: 39456 <at> debbugs.gnu.org
Subject: [PATCH 1/6] gnu: linux-libre-headers: Update to 5.4.16.
Date: Thu,  6 Feb 2020 19:02:40 +0100

* gnu/packages/linux.scm (linux-libre-headers-4.19.56): Rename to ...
(linux-libre-headers-5.4.16): ... this.  Update to 5.4.16.
(linux-libre-headers): Adjust accordingly.
* gnu/packages/commencement.scm (rsync-boot0): New variable.
(linux-libre-headers-boot0)[native-inputs]: Add RSYNC-BOOT0.
---
 gnu/packages/commencement.scm | 15 ++++++++++++++-
 gnu/packages/linux.scm        |  8 ++++----
 2 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/gnu/packages/commencement.scm b/gnu/packages/commencement.scm
index ced13eb075..c6abda3c29 100644
--- a/gnu/packages/commencement.scm
+++ b/gnu/packages/commencement.scm
@@ -6,7 +6,7 @@
 ;;; Copyright © 2017, 2018, 2019 Efraim Flashner <efraim <at> flashner.co.il>
 ;;; Copyright © 2018 Tobias Geerinckx-Rice <me <at> tobias.gr>
 ;;; Copyright © 2018 Jan (janneke) Nieuwenhuizen <janneke <at> gnu.org>
-;;; Copyright © 2019 Marius Bakke <mbakke <at> fastmail.com>
+;;; Copyright © 2019, 2020 Marius Bakke <mbakke <at> fastmail.com>
 ;;;
 ;;; This file is part of GNU Guix.
 ;;;
@@ -46,6 +46,7 @@
   #:use-module (gnu packages hurd)
   #:use-module (gnu packages texinfo)
   #:use-module (gnu packages pkg-config)
+  #:use-module (gnu packages rsync)
   #:use-module (gnu packages xml)
   #:use-module (guix packages)
   #:use-module (guix download)
@@ -1767,6 +1768,15 @@ exec " gcc "/bin/" program
        #:guile ,%bootstrap-guile
        #:tests? #f))))
 
+(define rsync-boot0
+  (package
+    (inherit rsync)
+    (native-inputs `(("perl" ,perl-boot0)))
+    (inputs (%boot0-inputs))
+    (arguments
+     `(#:implicit-inputs? #f
+       #:guile ,%bootstrap-guile))))
+
 (define linux-libre-headers-boot0
   (mlambda ()
     "Return Linux-Libre header files for the bootstrap environment."
@@ -1786,6 +1796,9 @@ exec " gcc "/bin/" program
          ;; Flex and Bison are required since version 4.16.
          ("flex" ,flex-boot0)
          ("bison" ,bison-boot0)
+
+         ;; Rsync is required since version 5.3.
+         ("rsync" ,rsync-boot0)
          ,@(%boot0-inputs))))))
 
 (define with-boot0
diff --git a/gnu/packages/linux.scm b/gnu/packages/linux.scm
index b3f46c0305..cfd20174e6 100644
--- a/gnu/packages/linux.scm
+++ b/gnu/packages/linux.scm
@@ -543,11 +543,11 @@ corresponding UPSTREAM-SOURCE (an origin), using the given DEBLOB-SCRIPTS."
 
 ;; The following package is used in the early bootstrap, and thus must be kept
 ;; stable and with minimal build requirements.
-(define-public linux-libre-headers-4.19.56
-  (make-linux-libre-headers "4.19.56"
-                            "1zqiic55viy065lhnkmhn33sz3bbbr2ykbm5f92yzd8lpc9zl7yx"))
+(define-public linux-libre-headers-5.4.16
+  (make-linux-libre-headers "5.4.16"
+                            "0czn2j83zvwn7karh77m8ai9z26jm4rmn4j2fk15qzl8gawzzwv7"))
 
-(define-public linux-libre-headers linux-libre-headers-4.19.56)
+(define-public linux-libre-headers linux-libre-headers-5.4.16)
 
 
 ;;;
-- 
2.25.0

Message #11 received at 39456 <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: 39456 <at> debbugs.gnu.org
Subject: [PATCH 2/6] gnu: dnsmasq: Fix build with linux-libre-headers >= 5.2.
Date: Thu,  6 Feb 2020 19:02:41 +0100

* gnu/packages/dns.scm (dnsmasq)[source](modules, snippet): New fields.
---
 gnu/packages/dns.scm | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/gnu/packages/dns.scm b/gnu/packages/dns.scm
index 7c52722cb6..a1f506905f 100644
--- a/gnu/packages/dns.scm
+++ b/gnu/packages/dns.scm
@@ -6,7 +6,7 @@
 ;;; Copyright © 2016 John Darrington <jmd <at> gnu.org>
 ;;; Copyright © 2016 ng0 <ng0 <at> n0.is>
 ;;; Copyright © 2016, 2017, 2018, 2019, 2020 Tobias Geerinckx-Rice <me <at> tobias.gr>
-;;; Copyright © 2016 Marius Bakke <mbakke <at> fastmail.com>
+;;; Copyright © 2016, 2020 Marius Bakke <mbakke <at> fastmail.com>
 ;;; Copyright © 2017 Vasile Dumitrascu <va511e <at> yahoo.com>
 ;;; Copyright © 2017 Gregor Giesen <giesen <at> zaehlwerk.net>
 ;;; Copyright © 2018 Oleg Pykhalov <go.wigust <at> gmail.com>
@@ -83,7 +83,17 @@
                     version ".tar.xz"))
               (sha256
                (base32
-                "1fv3g8vikj3sn37x1j6qsywn09w1jipvlv34j3q5qrljbrwa5ayd"))))
+                "1fv3g8vikj3sn37x1j6qsywn09w1jipvlv34j3q5qrljbrwa5ayd"))
+              (modules '((guix build utils)))
+              (snippet
+               '(begin
+                  ;; The SIOCGSTAMP ioctl is defined in <linux/sockios.h> instead
+                  ;; of <asm/sockios.h> starting with linux-libre-headers 5.2.
+                  ;; Remove this for dnsmasq versions > 2.80.
+                  (substitute* "src/dnsmasq.h"
+                    (("#if defined\\(HAVE_LINUX_NETWORK\\)" all)
+                     (string-append all "\n#include <linux/sockios.h>")))
+                  #t))))
     (build-system gnu-build-system)
     (native-inputs
      `(("pkg-config" ,pkg-config)))
-- 
2.25.0

Message #14 received at 39456 <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: 39456 <at> debbugs.gnu.org
Subject: [PATCH 4/6] gnu: cross-binutils: Fix xtensa build with Binutils 2.34.
Date: Thu,  6 Feb 2020 19:02:43 +0100

* gnu/packages/patches/binutils-revert-xtensa-shift.patch: New file.
* gnu/local.mk (dist_patch_DATA): Adjust accordingly.
* gnu/packages/cross-base.scm (package-with-patch): Rename to ...
(package-with-patches): ... this.  Allow multiple patches.
(cross-binutils): When building for xtensa, apply above patch.
---
 gnu/local.mk                                  |    1 +
 gnu/packages/cross-base.scm                   |   15 +-
 .../binutils-revert-xtensa-shift.patch        | 4091 +++++++++++++++++
 3 files changed, 4100 insertions(+), 7 deletions(-)
 create mode 100644 gnu/packages/patches/binutils-revert-xtensa-shift.patch

diff --git a/gnu/local.mk b/gnu/local.mk
index 60b1ce9248..3c080bcd6e 100644
--- a/gnu/local.mk
+++ b/gnu/local.mk
@@ -759,6 +759,7 @@ dist_patch_DATA =						\
   %D%/packages/patches/biber-fix-encoding-write.patch		\
   %D%/packages/patches/binutils-boot-2.20.1a.patch		\
   %D%/packages/patches/binutils-loongson-workaround.patch	\
+  %D%/packages/patches/binutils-revert-xtensa-shift.patch	\
   %D%/packages/patches/blender-2.79-newer-ffmpeg.patch		\
   %D%/packages/patches/blender-2.79-python-3.7-fix.patch	\
   %D%/packages/patches/byobu-writable-status.patch		\
diff --git a/gnu/packages/cross-base.scm b/gnu/packages/cross-base.scm
index 13237fb8a8..1e03a42b2f 100644
--- a/gnu/packages/cross-base.scm
+++ b/gnu/packages/cross-base.scm
@@ -4,7 +4,7 @@
 ;;; Copyright © 2016, 2019 Jan (janneke) Nieuwenhuizen <janneke <at> gnu.org>
 ;;; Copyright © 2016 Manolis Fragkiskos Ragkousis <manolis837 <at> gmail.com>
 ;;; Copyright © 2018 Tobias Geerinckx-Rice <me <at> tobias.gr>
-;;; Copyright © 2019 Marius Bakke <mbakke <at> fastmail.com>
+;;; Copyright © 2019, 2020 Marius Bakke <mbakke <at> fastmail.com>
 ;;; Copyright © 2019 Carl Dong <contact <at> carldong.me>
 ;;;
 ;;; This file is part of GNU Guix.
@@ -70,11 +70,11 @@
         `(cons ,(string-append "--target=" target)
                ,flags))))))
 
-(define (package-with-patch original patch)
-  "Return package ORIGINAL with PATCH applied."
+(define (package-with-patches original patches)
+  "Return package ORIGINAL with PATCHES applied."
   (package (inherit original)
     (source (origin (inherit (package-source original))
-              (patches (list patch))))))
+              (patches patches)))))
 
 (define (cross-binutils target)
   "Return a cross-Binutils for TARGET."
@@ -98,9 +98,10 @@
 
     ;; For Xtensa, apply Qualcomm's patch.
     (cross (if (string-prefix? "xtensa-" target)
-               (package-with-patch binutils
-                                   (search-patch
-                                    "ath9k-htc-firmware-binutils.patch"))
+               (package-with-patches binutils
+                                     (search-patches
+                                      "binutils-revert-xtensa-shift.patch"
+                                      "ath9k-htc-firmware-binutils.patch"))
                binutils)
            target)))
 
diff --git a/gnu/packages/patches/binutils-revert-xtensa-shift.patch b/gnu/packages/patches/binutils-revert-xtensa-shift.patch
new file mode 100644
index 0000000000..95e5784b9a
--- /dev/null
+++ b/gnu/packages/patches/binutils-revert-xtensa-shift.patch
@@ -0,0 +1,4091 @@
+This patch lazily reverts this upstream commit from Binutils 2.34:
+
+https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=567607c11fbf710513d0924192f3ed528c02d76f
+
+In order to avoid porting "ath9k-htc-firmware-binutils.patch" to the newer code.
+
+diff --git a/bfd/xtensa-modules.c b/bfd/xtensa-modules.c
+index 9af5653313..785dfe7aa0 100644
+--- a/bfd/xtensa-modules.c
++++ b/bfd/xtensa-modules.c
+@@ -302,1356 +302,1539 @@ static xtensa_state_internal states[] = {
+ static unsigned
+ Field_t_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_t_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_t_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_t_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_t_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_t_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_t_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_bbi4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_bbi4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_bbi_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_bbi_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_bbi_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 26) & 1;
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_bbi_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+ }
+ 
+ static unsigned
+ Field_imm12_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xfff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 12) | ((insn[0] << 8) >> 20);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm12_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xfff;
++  uint32 tie_t;
++  tie_t = (val << 20) >> 20;
+   insn[0] = (insn[0] & ~0xfff000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm8_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 0xff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 8) | ((insn[0] << 8) >> 24);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xff;
++  uint32 tie_t;
++  tie_t = (val << 24) >> 24;
+   insn[0] = (insn[0] & ~0xff0000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_imm8_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm8_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xff;
++  uint32 tie_t;
++  tie_t = (val << 24) >> 24;
+   insn[0] = (insn[0] & ~0xff000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm8_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm8_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_s_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_s_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_s_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_s_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_s_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_s_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_s_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm12b_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
+-  tie_t = (tie_t << 8) | ((insn[0] >> 16) & 0xff);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
++  tie_t = (tie_t << 8) | ((insn[0] << 8) >> 24);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm12b_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xff;
++  uint32 tie_t;
++  tie_t = (val << 24) >> 24;
+   insn[0] = (insn[0] & ~0xff0000) | (tie_t << 16);
+-  tie_t = (val >> 8) & 0xf;
++  tie_t = (val << 20) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_imm12b_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xf;
+-  tie_t = (tie_t << 8) | ((insn[0] >> 12) & 0xff);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
++  tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm12b_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xff;
++  uint32 tie_t;
++  tie_t = (val << 24) >> 24;
+   insn[0] = (insn[0] & ~0xff000) | (tie_t << 12);
+-  tie_t = (val >> 8) & 0xf;
++  tie_t = (val << 20) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm12b_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xfff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 12) | ((insn[0] << 16) >> 20);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm12b_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xfff;
++  uint32 tie_t;
++  tie_t = (val << 20) >> 20;
+   insn[0] = (insn[0] & ~0xfff0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm16_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xffff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 16) | ((insn[0] << 8) >> 16);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm16_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xffff;
++  uint32 tie_t;
++  tie_t = (val << 16) >> 16;
+   insn[0] = (insn[0] & ~0xffff00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_imm16_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xffff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 16) | ((insn[0] << 12) >> 16);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm16_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xffff;
++  uint32 tie_t;
++  tie_t = (val << 16) >> 16;
+   insn[0] = (insn[0] & ~0xffff0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_m_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_m_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_m_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 2) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 28) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_m_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc) | (tie_t << 2);
+ }
+ 
+ static unsigned
+ Field_n_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_n_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_n_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 30) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_n_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x3) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_offset_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 0x3ffff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 18) | ((insn[0] << 8) >> 14);
+   return tie_t;
+ }
+ 
+ static void
+ Field_offset_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x3ffff;
++  uint32 tie_t;
++  tie_t = (val << 14) >> 14;
+   insn[0] = (insn[0] & ~0xffffc0) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_offset_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0x3ffff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 18) | ((insn[0] << 14) >> 14);
+   return tie_t;
+ }
+ 
+ static void
+ Field_offset_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x3ffff;
++  uint32 tie_t;
++  tie_t = (val << 14) >> 14;
+   insn[0] = (insn[0] & ~0x3ffff) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_op0_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_op0_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_op0_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_op1_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_op1_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op1_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_op2_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 20) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 8) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00000) | (tie_t << 20);
+ }
+ 
+ static unsigned
+ Field_op2_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op2_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_op2_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op2_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_r_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_r_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_r_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_r_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_r_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_r_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_r_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_sa4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 20) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sa4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x100000) | (tie_t << 20);
+ }
+ 
+ static unsigned
+ Field_sae4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sae4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_sae4_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] << 12) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sae4_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_sae_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 8) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sae_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_sae_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sae_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_sae_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x1f;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 5) | ((insn[0] << 15) >> 27);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sae_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x1f;
++  uint32 tie_t;
++  tie_t = (val << 27) >> 27;
+   insn[0] = (insn[0] & ~0x1f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_sal_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 20) & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sal_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x100000) | (tie_t << 20);
+ }
+ 
+ static unsigned
+ Field_sal_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 1;
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sal_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_sal_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sal_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_sargt_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 20) & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 8) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sargt_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x100000) | (tie_t << 20);
+ }
+ 
+ static unsigned
+ Field_sargt_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sargt_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_sargt_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0x1f;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 5) | ((insn[0] << 19) >> 27);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sargt_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x1f;
++  uint32 tie_t;
++  tie_t = (val << 27) >> 27;
+   insn[0] = (insn[0] & ~0x1f00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_sargt_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0x1f;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 5) | ((insn[0] << 19) >> 27);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sargt_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x1f;
++  uint32 tie_t;
++  tie_t = (val << 27) >> 27;
+   insn[0] = (insn[0] & ~0x1f00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_sas4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sas4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_sas_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 8) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sas_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_sas_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 1;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 31) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sas_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x1) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_sr_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 8) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sr_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_sr_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 8) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sr_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_sr_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 8) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_sr_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_st_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_st_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_st_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_st_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_st_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 4) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_st_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_thi3_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 5) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_thi3_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
+ }
+ 
+ static unsigned
+ Field_thi3_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 1) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 28) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_thi3_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe) | (tie_t << 1);
+ }
+ 
+ static unsigned
+ Field_imm4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm4_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm4_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_mn_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 3;
+-  tie_t = (tie_t << 2) | ((insn[0] >> 4) & 3);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
++  tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_mn_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
+-  tie_t = (val >> 2) & 3;
++  tie_t = (val << 28) >> 30;
+   insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_i_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_i_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_i_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_i_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_imm6lo_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm6lo_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm6lo_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm6lo_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm6hi_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm6hi_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm6hi_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm6hi_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm7lo_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm7lo_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm7lo_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm7lo_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_imm7hi_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm7hi_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm7hi_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm7hi_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_z_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_z_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_z_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_z_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_imm6_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 3;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 12) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm6_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+-  tie_t = (val >> 4) & 3;
++  tie_t = (val << 26) >> 30;
+   insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm6_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 3;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 12) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm6_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+-  tie_t = (val >> 4) & 3;
++  tie_t = (val << 26) >> 30;
+   insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm7_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 7;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 12) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm7_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+-  tie_t = (val >> 4) & 7;
++  tie_t = (val << 25) >> 29;
+   insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm7_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 7;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 12) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_imm7_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+-  tie_t = (val >> 4) & 7;
++  tie_t = (val << 25) >> 29;
+   insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_imm7_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[0] & 0x7f;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 7) | ((insn[0] << 25) >> 25);
+   return tie_t;
+ }
+ 
+@@ -1659,1641 +1842,1852 @@ static void
+ Field_imm7_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+   uint32 tie_t;
+-  tie_t = val & 0x7f;
++  tie_t = (val << 25) >> 25;
+   insn[0] = (insn[0] & ~0x7f) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_r3_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 15) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r3_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
+ }
+ 
+ static unsigned
+ Field_rbit2_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 14) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_rbit2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000) | (tie_t << 14);
+ }
+ 
+ static unsigned
+ Field_rhi_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 14) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_rhi_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
+ }
+ 
+ static unsigned
+ Field_t3_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t3_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_tbit2_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_tbit2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_tlo_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 4) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_tlo_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
+ }
+ 
+ static unsigned
+ Field_w_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_w_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x3000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_y_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_y_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_x_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 14) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_x_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000) | (tie_t << 14);
+ }
+ 
+ static unsigned
+ Field_t2_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 5) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
+ }
+ 
+ static unsigned
+ Field_t2_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 5) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
+ }
+ 
+ static unsigned
+ Field_t2_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 5) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
+ }
+ 
+ static unsigned
+ Field_s2_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 9) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe00) | (tie_t << 9);
+ }
+ 
+ static unsigned
+ Field_s2_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 9) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe00) | (tie_t << 9);
+ }
+ 
+ static unsigned
+ Field_s2_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 9) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe00) | (tie_t << 9);
+ }
+ 
+ static unsigned
+ Field_r2_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 13) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
+ }
+ 
+ static unsigned
+ Field_r2_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 13) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
+ }
+ 
+ static unsigned
+ Field_r2_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 13) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
+ }
+ 
+ static unsigned
+ Field_t4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_t4_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_t4_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_s4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 10) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
+ }
+ 
+ static unsigned
+ Field_s4_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 10) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
+ }
+ 
+ static unsigned
+ Field_s4_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 10) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
+ }
+ 
+ static unsigned
+ Field_r4_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 14) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
+ }
+ 
+ static unsigned
+ Field_r4_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 14) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
+ }
+ 
+ static unsigned
+ Field_r4_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 14) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
+ }
+ 
+ static unsigned
+ Field_t8_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_t8_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_t8_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_t8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_s8_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 11) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
+ }
+ 
+ static unsigned
+ Field_s8_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 11) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
+ }
+ 
+ static unsigned
+ Field_s8_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 11) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_s8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
+ }
+ 
+ static unsigned
+ Field_r8_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 15) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
+ }
+ 
+ static unsigned
+ Field_r8_Slot_inst16a_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 15) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
+ }
+ 
+ static unsigned
+ Field_r8_Slot_inst16b_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 15) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_r8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
+ }
+ 
+ static unsigned
+ Field_xt_wbr15_imm_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 9) & 0x7fff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 15) | ((insn[0] << 8) >> 17);
+   return tie_t;
+ }
+ 
+ static void
+ Field_xt_wbr15_imm_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x7fff;
++  uint32 tie_t;
++  tie_t = (val << 17) >> 17;
+   insn[0] = (insn[0] & ~0xfffe00) | (tie_t << 9);
+ }
+ 
+ static unsigned
+ Field_xt_wbr18_imm_Slot_inst_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 6) & 0x3ffff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 18) | ((insn[0] << 8) >> 14);
+   return tie_t;
+ }
+ 
+ static void
+ Field_xt_wbr18_imm_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x3ffff;
++  uint32 tie_t;
++  tie_t = (val << 14) >> 14;
+   insn[0] = (insn[0] & ~0xffffc0) | (tie_t << 6);
+ }
+ 
+ static unsigned
+ Field_xt_wbr18_imm_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0x3ffff;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 18) | ((insn[0] << 6) >> 14);
+   return tie_t;
+ }
+ 
+ static void
+ Field_xt_wbr18_imm_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x3ffff;
++  uint32 tie_t;
++  tie_t = (val << 14) >> 14;
+   insn[0] = (insn[0] & ~0x3ffff00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 20) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 8) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00000) | (tie_t << 20);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld7_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 13) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld7_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld8_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 13) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld8_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld9_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 17) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld9_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld11_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 17) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld11_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld49xt_flix64_slot0_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 0xf;
+-  tie_t = (tie_t << 4) | ((insn[0] >> 8) & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28);
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld49xt_flix64_slot0_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+-  tie_t = (val >> 4) & 0xf;
++  tie_t = (val << 24) >> 28;
+   insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_op0_s4_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 18) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_s4_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld16_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld16_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld19xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 17) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 14) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld19xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x20000) | (tie_t << 17);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld20xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 16) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld20xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x30000) | (tie_t << 16);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld21xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 13) & 0x1f;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 5) | ((insn[0] << 14) >> 27);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld21xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x1f;
++  uint32 tie_t;
++  tie_t = (val << 27) >> 27;
+   insn[0] = (insn[0] & ~0x3e000) | (tie_t << 13);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld22xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld22xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x3f;
++  uint32 tie_t;
++  tie_t = (val << 26) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld23xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
+-  tie_t = (tie_t << 3) | ((insn[0] >> 4) & 7);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
++  tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld23xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
+-  tie_t = (val >> 3) & 0x3f;
++  tie_t = (val << 23) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld25xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
+-  tie_t = (tie_t << 3) | ((insn[0] >> 4) & 7);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
++  tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld25xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
+-  tie_t = (val >> 3) & 0x3f;
++  tie_t = (val << 23) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld26xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
+-  tie_t = (tie_t << 2) | ((insn[0] >> 5) & 3);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
++  tie_t = (tie_t << 2) | ((insn[0] << 25) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld26xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x60) | (tie_t << 5);
+-  tie_t = (val >> 2) & 0x3f;
++  tie_t = (val << 24) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld28xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 6) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
++  tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld28xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
+-  tie_t = (val >> 1) & 0x3f;
++  tie_t = (val << 25) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld30xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
+-  tie_t = (tie_t << 2) | ((insn[0] >> 8) & 3);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
++  tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld30xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x300) | (tie_t << 8);
+-  tie_t = (val >> 2) & 0x3f;
++  tie_t = (val << 24) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld32xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
+-  tie_t = (tie_t << 2) | ((insn[0] >> 8) & 3);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
++  tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld32xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x300) | (tie_t << 8);
+-  tie_t = (val >> 2) & 0x3f;
++  tie_t = (val << 24) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld33xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 0x3f;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 9) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
++  tie_t = (tie_t << 1) | ((insn[0] << 22) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld33xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x200) | (tie_t << 9);
+-  tie_t = (val >> 1) & 0x3f;
++  tie_t = (val << 25) >> 26;
+   insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld35xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 15) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 14) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld35xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x38000) | (tie_t << 15);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld51xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld51xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld52xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld52xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 10) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld54xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 0x1f;
+-  tie_t = (tie_t << 6) | (insn[0] & 0x3f);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27);
++  tie_t = (tie_t << 6) | ((insn[0] << 26) >> 26);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld54xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x3f;
++  uint32 tie_t;
++  tie_t = (val << 26) >> 26;
+   insn[0] = (insn[0] & ~0x3f) | (tie_t << 0);
+-  tie_t = (val >> 6) & 0x1f;
++  tie_t = (val << 21) >> 27;
+   insn[0] = (insn[0] & ~0xf80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld57xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld57xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld58xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 10) & 3;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 8) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
++  tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld58xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x100) | (tie_t << 8);
+-  tie_t = (val >> 1) & 3;
++  tie_t = (val << 29) >> 30;
+   insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld60xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 7) & 1;
+-  tie_t = (tie_t << 5) | (insn[0] & 0x1f);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
++  tie_t = (tie_t << 5) | ((insn[0] << 27) >> 27);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld60xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x1f;
++  uint32 tie_t;
++  tie_t = (val << 27) >> 27;
+   insn[0] = (insn[0] & ~0x1f) | (tie_t << 0);
+-  tie_t = (val >> 5) & 1;
++  tie_t = (val << 26) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld62xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 17) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld62xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x7000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_op0_s5_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 13) & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_s5_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld36xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld36xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld37xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 7) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld37xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+-  tie_t = (val >> 1) & 1;
++  tie_t = (val << 30) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld39xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 7) & 1);
+-  tie_t = (tie_t << 1) | ((insn[0] >> 4) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
++  tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld39xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
+-  tie_t = (val >> 1) & 1;
++  tie_t = (val << 30) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+-  tie_t = (val >> 2) & 1;
++  tie_t = (val << 29) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld41xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 7) & 1);
+-  tie_t = (tie_t << 1) | ((insn[0] >> 4) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
++  tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld41xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
+-  tie_t = (val >> 1) & 1;
++  tie_t = (val << 30) >> 31;
+   insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
+-  tie_t = (val >> 2) & 1;
++  tie_t = (val << 29) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld42xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 3) | ((insn[0] >> 8) & 7);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld42xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x700) | (tie_t << 8);
+-  tie_t = (val >> 3) & 1;
++  tie_t = (val << 28) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld44xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 3) | ((insn[0] >> 8) & 7);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld44xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[0] = (insn[0] & ~0x700) | (tie_t << 8);
+-  tie_t = (val >> 3) & 1;
++  tie_t = (val << 28) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld45xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 2) | ((insn[0] >> 9) & 3);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 2) | ((insn[0] << 21) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld45xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x600) | (tie_t << 9);
+-  tie_t = (val >> 2) & 1;
++  tie_t = (val << 29) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld47xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 12) & 1;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 10) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
++  tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld47xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x400) | (tie_t << 10);
+-  tie_t = (val >> 1) & 1;
++  tie_t = (val << 30) >> 31;
+   insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld63xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 5) & 3;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 2) | ((insn[0] << 25) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld63xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x60) | (tie_t << 5);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 11) & 1;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld65xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 8) & 0xf;
+-  tie_t = (tie_t << 2) | ((insn[0] >> 5) & 3);
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
++  tie_t = (tie_t << 2) | ((insn[0] << 25) >> 30);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld65xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 3;
++  tie_t = (val << 26) >> 30;
+   insn[0] = (insn[0] & ~0x60) | (tie_t << 5);
+-  tie_t = (val >> 6) & 0xf;
++  tie_t = (val << 22) >> 28;
+   insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld66xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 11) & 1;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 8) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
++  tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld66xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x100) | (tie_t << 8);
+-  tie_t = (val >> 1) & 1;
++  tie_t = (val << 30) >> 31;
+   insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld68xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 11) & 1;
+-  tie_t = (tie_t << 2) | ((insn[0] >> 8) & 3);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
++  tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld68xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 3;
++  uint32 tie_t;
++  tie_t = (val << 30) >> 30;
+   insn[0] = (insn[0] & ~0x300) | (tie_t << 8);
+-  tie_t = (val >> 2) & 1;
++  tie_t = (val << 29) >> 31;
+   insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
+ }
+ 
+ static unsigned
+ Field_op0_s6_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 27) & 0x1f;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 5) | ((insn[0] << 0) >> 27);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_s6_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0x1f;
++  uint32 tie_t;
++  tie_t = (val << 27) >> 27;
+   insn[0] = (insn[0] & ~0xf8000000) | (tie_t << 27);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld70xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld70xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 5) & 7;
++  tie_t = (val << 24) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 7;
++  uint32 tie_t;
++  tie_t = (val << 29) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld72xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld72xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 5) & 7;
++  tie_t = (val << 24) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld73xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld73xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 5) & 7;
++  tie_t = (val << 24) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld74xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
+-  tie_t = (tie_t << 4) | (insn[0] & 0xf);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
++  tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld74xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
+-  tie_t = (val >> 4) & 1;
++  tie_t = (val << 27) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 5) & 7;
++  tie_t = (val << 24) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld75xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld75xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld76xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld76xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld77xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld77xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld78xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld78xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld79xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld79xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld80xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld80xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld81xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld81xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld82xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld82xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld83xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld83xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld84xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld84xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld85xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld85xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld86xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld86xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld87xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld87xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld88xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld88xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld89xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld89xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld90xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld90xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld91xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld91xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld92xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 1) | ((insn[0] >> 26) & 1);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
+   return tie_t;
+ }
+ 
+ static void
+ Field_combined3e2c5767_fld92xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 1;
++  uint32 tie_t;
++  tie_t = (val << 31) >> 31;
+   insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
+-  tie_t = (val >> 1) & 7;
++  tie_t = (val << 28) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_combined3e2c5767_fld93xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = insn[1] & 7;
+-  tie_t = (tie_t << 27) | (insn[0] & 0x7ffffff);
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
++  tie_t = (tie_t << 27) | ((insn[0] << 5) >> 5);
+   return tie_t;
+ }
+ 
+@@ -3301,23 +3695,25 @@ static void
+ Field_combined3e2c5767_fld93xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
+ {
+   uint32 tie_t;
+-  tie_t = val & 0x7ffffff;
++  tie_t = (val << 5) >> 5;
+   insn[0] = (insn[0] & ~0x7ffffff) | (tie_t << 0);
+-  tie_t = (val >> 27) & 7;
++  tie_t = (val << 2) >> 29;
+   insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
+ }
+ 
+ static unsigned
+ Field_op0_xt_flix64_slot0_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
+ {
+-  unsigned tie_t = (insn[0] >> 20) & 0xf;
++  unsigned tie_t = 0;
++  tie_t = (tie_t << 4) | ((insn[0] << 8) >> 28);
+   return tie_t;
+ }
+ 
+ static void
+ Field_op0_xt_flix64_slot0_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
+ {
+-  uint32 tie_t = val & 0xf;
++  uint32 tie_t;
++  tie_t = (val << 28) >> 28;
+   insn[0] = (insn[0] & ~0xf00000) | (tie_t << 20);
+ }
+ 
+@@ -3502,7 +3898,7 @@ Operand_soffsetx4_decode (uint32 *valp)
+ {
+   unsigned soffsetx4_0, offset_0;
+   offset_0 = *valp & 0x3ffff;
+-  soffsetx4_0 = 0x4 + (((offset_0 ^ 0x20000) - 0x20000) << 2);
++  soffsetx4_0 = 0x4 + ((((int) offset_0 << 14) >> 14) << 2);
+   *valp = soffsetx4_0;
+   return 0;
+ }
+@@ -3556,7 +3952,7 @@ Operand_simm4_decode (uint32 *valp)
+ {
+   unsigned simm4_0, mn_0;
+   mn_0 = *valp & 0xf;
+-  simm4_0 = (mn_0 ^ 0x8) - 0x8;
++  simm4_0 = ((int) mn_0 << 28) >> 28;
+   *valp = simm4_0;
+   return 0;
+ }
+@@ -3688,7 +4084,7 @@ Operand_immrx4_decode (uint32 *valp)
+ {
+   unsigned immrx4_0, r_0;
+   r_0 = *valp & 0xf;
+-  immrx4_0 = (0xfffffff0 | r_0) << 2;
++  immrx4_0 = (((0xfffffff) << 4) | r_0) << 2;
+   *valp = immrx4_0;
+   return 0;
+ }
+@@ -3976,7 +4372,7 @@ Operand_simm8_decode (uint32 *valp)
+ {
+   unsigned simm8_0, imm8_0;
+   imm8_0 = *valp & 0xff;
+-  simm8_0 = (imm8_0 ^ 0x80) - 0x80;
++  simm8_0 = ((int) imm8_0 << 24) >> 24;
+   *valp = simm8_0;
+   return 0;
+ }
+@@ -3996,7 +4392,7 @@ Operand_simm8x256_decode (uint32 *valp)
+ {
+   unsigned simm8x256_0, imm8_0;
+   imm8_0 = *valp & 0xff;
+-  simm8x256_0 = ((imm8_0 ^ 0x80) - 0x80) << 8;
++  simm8x256_0 = (((int) imm8_0 << 24) >> 24) << 8;
+   *valp = simm8x256_0;
+   return 0;
+ }
+@@ -4016,7 +4412,7 @@ Operand_simm12b_decode (uint32 *valp)
+ {
+   unsigned simm12b_0, imm12b_0;
+   imm12b_0 = *valp & 0xfff;
+-  simm12b_0 = (imm12b_0 ^ 0x800) - 0x800;
++  simm12b_0 = ((int) imm12b_0 << 20) >> 20;
+   *valp = simm12b_0;
+   return 0;
+ }
+@@ -4076,7 +4472,7 @@ Operand_label8_decode (uint32 *valp)
+ {
+   unsigned label8_0, imm8_0;
+   imm8_0 = *valp & 0xff;
+-  label8_0 = 0x4 + ((imm8_0 ^ 0x80) - 0x80);
++  label8_0 = 0x4 + (((int) imm8_0 << 24) >> 24);
+   *valp = label8_0;
+   return 0;
+ }
+@@ -4144,7 +4540,7 @@ Operand_label12_decode (uint32 *valp)
+ {
+   unsigned label12_0, imm12_0;
+   imm12_0 = *valp & 0xfff;
+-  label12_0 = 0x4 + ((imm12_0 ^ 0x800) - 0x800);
++  label12_0 = 0x4 + (((int) imm12_0 << 20) >> 20);
+   *valp = label12_0;
+   return 0;
+ }
+@@ -4178,7 +4574,7 @@ Operand_soffset_decode (uint32 *valp)
+ {
+   unsigned soffset_0, offset_0;
+   offset_0 = *valp & 0x3ffff;
+-  soffset_0 = 0x4 + ((offset_0 ^ 0x20000) - 0x20000);
++  soffset_0 = 0x4 + (((int) offset_0 << 14) >> 14);
+   *valp = soffset_0;
+   return 0;
+ }
+@@ -4212,7 +4608,7 @@ Operand_uimm16x4_decode (uint32 *valp)
+ {
+   unsigned uimm16x4_0, imm16_0;
+   imm16_0 = *valp & 0xffff;
+-  uimm16x4_0 = (0xffff0000 | imm16_0) << 2;
++  uimm16x4_0 = (((0xffff) << 16) | imm16_0) << 2;
+   *valp = uimm16x4_0;
+   return 0;
+ }
+@@ -4656,7 +5052,7 @@ Operand_xt_wbr15_label_decode (uint32 *valp)
+ {
+   unsigned xt_wbr15_label_0, xt_wbr15_imm_0;
+   xt_wbr15_imm_0 = *valp & 0x7fff;
+-  xt_wbr15_label_0 = 0x4 + ((xt_wbr15_imm_0 ^ 0x4000) - 0x4000);
++  xt_wbr15_label_0 = 0x4 + (((int) xt_wbr15_imm_0 << 17) >> 17);
+   *valp = xt_wbr15_label_0;
+   return 0;
+ }
+@@ -4690,7 +5086,7 @@ Operand_xt_wbr18_label_decode (uint32 *valp)
+ {
+   unsigned xt_wbr18_label_0, xt_wbr18_imm_0;
+   xt_wbr18_imm_0 = *valp & 0x3ffff;
+-  xt_wbr18_label_0 = 0x4 + ((xt_wbr18_imm_0 ^ 0x20000) - 0x20000);
++  xt_wbr18_label_0 = 0x4 + (((int) xt_wbr18_imm_0 << 14) >> 14);
+   *valp = xt_wbr18_label_0;
+   return 0;
+ }
-- 
2.25.0

Message #17 received at 39456 <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: 39456 <at> debbugs.gnu.org
Subject: [PATCH 3/6] gnu: binutils: Update to 2.34.
Date: Thu,  6 Feb 2020 19:02:42 +0100

* gnu/packages/base.scm (binutils): Update to 2.34.
[arguments]: Add #:make-flags.
[properties]: New field.
(binutils+documentation): New public variable.
---
 gnu/packages/base.scm | 30 ++++++++++++++++++++++++++----
 1 file changed, 26 insertions(+), 4 deletions(-)

diff --git a/gnu/packages/base.scm b/gnu/packages/base.scm
index 45f6cf79ba..a37b10153e 100644
--- a/gnu/packages/base.scm
+++ b/gnu/packages/base.scm
@@ -10,7 +10,7 @@
 ;;; Copyright © 2016, 2018 Alex Vong <alexvong1995 <at> gmail.com>
 ;;; Copyright © 2017 Rene Saavedra <rennes <at> openmailbox.org>
 ;;; Copyright © 2017 Mathieu Othacehe <m.othacehe <at> gmail.com>
-;;; Copyright © 2017, 2018 Marius Bakke <mbakke <at> fastmail.com>
+;;; Copyright © 2017, 2018, 2020 Marius Bakke <mbakke <at> fastmail.com>
 ;;; Copyright © 2017 Eric Bavier <bavier <at> member.fsf.org>
 ;;; Copyright © 2018 Tobias Geerinckx-Rice <me <at> tobias.gr>
 ;;; Copyright © 2018, 2019 Ricardo Wurmus <rekado <at> elephly.net>
@@ -399,14 +399,14 @@ change.  GNU make offers many powerful extensions over the standard utility.")
 (define-public binutils
   (package
    (name "binutils")
-   (version "2.33.1")
+   (version "2.34")
    (source (origin
             (method url-fetch)
             (uri (string-append "mirror://gnu/binutils/binutils-"
                                 version ".tar.bz2"))
             (sha256
              (base32
-              "1cmd0riv37bqy9mwbg6n3523qgr8b3bbm5kwj19sjrasl4yq9d0c"))
+              "1rin1f5c7wm4n3piky6xilcrpf2s0n3dd5vqq8irrxkcic3i1w49"))
             (patches (search-patches "binutils-loongson-workaround.patch"))))
    (build-system gnu-build-system)
 
@@ -431,7 +431,17 @@ change.  GNU make offers many powerful extensions over the standard utility.")
 
                           ;; Make sure 'ar' and 'ranlib' produce archives in a
                           ;; deterministic fashion.
-                          "--enable-deterministic-archives")))
+                          "--enable-deterministic-archives")
+
+      ;; XXX: binutils 2.34 was mistakenly released without generated manuals:
+      ;; <https://sourceware.org/bugzilla/show_bug.cgi?id=25491>.  To avoid a
+      ;; circular dependency on texinfo, prevent the build system from creating
+      ;; the manuals by calling "true" instead of "makeinfo"...
+      #:make-flags '("MAKEINFO=true")))
+
+   ;; ...and "hide" this package so that users who install binutils get the
+   ;; version with documentation defined below.
+   (properties '((hidden? . #t)))
 
    (synopsis "Binary utilities: bfd gas gprof ld")
    (description
@@ -444,6 +454,18 @@ included.")
    (license gpl3+)
    (home-page "https://www.gnu.org/software/binutils/")))
 
+;; Work around a problem with binutils 2.34 whereby manuals are missing from
+;; the release tarball.  Remove this and the related code above when updating.
+(define-public binutils+documentation
+  (package/inherit
+   binutils
+   (native-inputs
+    `(("texinfo" ,texinfo)))
+   (arguments
+    (substitute-keyword-arguments (package-arguments binutils)
+      ((#:make-flags _ ''()) ''())))
+   (properties '())))
+
 (define-public binutils-gold
   (package
     (inherit binutils)
-- 
2.25.0

Message #20 received at 39456 <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: 39456 <at> debbugs.gnu.org
Subject: [PATCH 6/6] gnu: libfaketime: Fix build with glibc 2.31.
Date: Thu,  6 Feb 2020 19:02:45 +0100

* gnu/packages/check.scm (libfaketime)[arguments]: Disable
"deprecated-declarations" warnings before running the test suite.
---
 gnu/packages/check.scm | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/gnu/packages/check.scm b/gnu/packages/check.scm
index 749bcc7831..a5cf6ea3ff 100644
--- a/gnu/packages/check.scm
+++ b/gnu/packages/check.scm
@@ -2411,6 +2411,10 @@ portable to just about any platform.")
                     (lambda _
                       (substitute* "test/functests/test_exclude_mono.sh"
                         (("/bin/bash") (which "bash")))
+
+                      ;; Do not fail due to use of 'ftime', which was deprecated in
+                      ;; glibc 2.31.  Remove this for later versions of libfaketime.
+                      (setenv "FAKETIME_COMPILE_CFLAGS" "-Wno-deprecated-declarations")
                       #t)))
        #:test-target "test"))
     (native-inputs
-- 
2.25.0

Message #23 received at 39456 <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: 39456 <at> debbugs.gnu.org
Subject: [PATCH 5/6] gnu: glibc: Update to 2.31.
Date: Thu,  6 Feb 2020 19:02:44 +0100

* gnu/packages/patches/glibc-supported-locales.patch: Adjust for upstream
changes.
* gnu/packages/patches/glibc-2.29-supported-locales.patch: New file, with
previous contents.
* gnu/packages/patches/gcc-4.9-libsanitizer-mode-size.patch,
gnu/packages/patches/gcc-6-libsanitizer-mode-size.patch,
gnu/packages/patches/gcc-7-libsanitizer-mode-size.patch,
gnu/packages/patches/gcc-8-libsanitizer-mode-size.patch,
gnu/packages/patches/gcc-9-libsanitizer-mode-size.patch: New files.
* gnu/local.mk (dist_patch_DATA): Adjust accordingly.
* gnu/packages/gcc.scm (gcc-4.9, gcc-5, gcc-6, gcc-7, gcc-8,
gcc-9)[source](patches): Add the respective patch files.
* gnu/packages/base.scm (glibc): Update to 2.31.
[source](patches): Remove obsolete.
(glibc-2.30): New public variable.
(glibc-2.29)[source](patches): Adjust for renamed patch file.
---
 gnu/local.mk                                  |  6 ++
 gnu/packages/base.scm                         | 25 ++++++--
 gnu/packages/gcc.scm                          |  6 ++
 .../gcc-4.9-libsanitizer-mode-size.patch      | 52 +++++++++++++++++
 .../gcc-6-libsanitizer-mode-size.patch        | 53 +++++++++++++++++
 .../gcc-7-libsanitizer-mode-size.patch        | 53 +++++++++++++++++
 .../gcc-8-libsanitizer-mode-size.patch        | 56 ++++++++++++++++++
 .../gcc-9-libsanitizer-mode-size.patch        | 58 +++++++++++++++++++
 .../glibc-2.29-supported-locales.patch        | 33 +++++++++++
 .../patches/glibc-supported-locales.patch     | 11 ++--
 10 files changed, 343 insertions(+), 10 deletions(-)
 create mode 100644 gnu/packages/patches/gcc-4.9-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-6-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-7-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-8-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/gcc-9-libsanitizer-mode-size.patch
 create mode 100644 gnu/packages/patches/glibc-2.29-supported-locales.patch

diff --git a/gnu/local.mk b/gnu/local.mk
index 3c080bcd6e..4784e338d9 100644
--- a/gnu/local.mk
+++ b/gnu/local.mk
@@ -886,6 +886,11 @@ dist_patch_DATA =						\
   %D%/packages/patches/gcc-4.9-libsanitizer-fix.patch		\
   %D%/packages/patches/gcc-4.9-libsanitizer-ustat.patch		\
   %D%/packages/patches/gcc-libsanitizer-ustat.patch		\
+  %D%/packages/patches/gcc-4.9-libsanitizer-mode-size.patch	\
+  %D%/packages/patches/gcc-6-libsanitizer-mode-size.patch	\
+  %D%/packages/patches/gcc-7-libsanitizer-mode-size.patch	\
+  %D%/packages/patches/gcc-8-libsanitizer-mode-size.patch	\
+  %D%/packages/patches/gcc-9-libsanitizer-mode-size.patch	\
   %D%/packages/patches/gcc-libvtv-runpath.patch			\
   %D%/packages/patches/gcc-strmov-store-file-names.patch	\
   %D%/packages/patches/gcc-4-compile-with-gcc-5.patch		 \
@@ -957,6 +962,7 @@ dist_patch_DATA =						\
   %D%/packages/patches/glibc-2.29-git-updates.patch     	\
   %D%/packages/patches/glibc-2.27-supported-locales.patch     	\
   %D%/packages/patches/glibc-2.28-supported-locales.patch     	\
+  %D%/packages/patches/glibc-2.29-supported-locales.patch     	\
   %D%/packages/patches/glibc-supported-locales.patch     	\
   %D%/packages/patches/glm-restore-install-target.patch		\
   %D%/packages/patches/gmp-arm-asm-nothumb.patch		\
diff --git a/gnu/packages/base.scm b/gnu/packages/base.scm
index a37b10153e..2f93bfd638 100644
--- a/gnu/packages/base.scm
+++ b/gnu/packages/base.scm
@@ -574,13 +574,13 @@ the store.")
   ;; version 2.28, GNU/Hurd used a different glibc branch.
   (package
    (name "glibc")
-   (version "2.30")
+   (version "2.31")
    (source (origin
             (method url-fetch)
             (uri (string-append "mirror://gnu/glibc/glibc-" version ".tar.xz"))
             (sha256
              (base32
-              "1bxqpg91d02qnaz837a5kamm0f43pr1il4r9pknygywsar713i72"))
+              "05zxkyz9bv3j9h0xyid1rhvh3klhsmrpkf3bcs6frvlgyr2gwilj"))
             (snippet
              ;; Disable 'ldconfig' and /etc/ld.so.cache.  The latter is
              ;; required on LFS distros to avoid loading the distro's libc.so
@@ -592,7 +592,6 @@ the store.")
                 #t))
             (modules '((guix build utils)))
             (patches (search-patches "glibc-ldd-x86_64.patch"
-                                     "glibc-CVE-2019-19126.patch"
                                      "glibc-hidden-visibility-ldconfig.patch"
                                      "glibc-versioned-locpath.patch"
                                      "glibc-allow-kernel-2.6.32.patch"
@@ -824,6 +823,24 @@ with the Linux kernel.")
 ;; Below are old libc versions, which we use mostly to build locale data in
 ;; the old format (which the new libc cannot cope with.)
 
+(define-public glibc-2.30
+  (package
+    (inherit glibc)
+    (version "2.30")
+    (source (origin
+              (inherit (package-source glibc))
+              (uri (string-append "mirror://gnu/glibc/glibc-" version ".tar.xz"))
+              (sha256
+               (base32
+                "1bxqpg91d02qnaz837a5kamm0f43pr1il4r9pknygywsar713i72"))
+              (patches (search-patches "glibc-ldd-x86_64.patch"
+                                       "glibc-CVE-2019-19126.patch"
+                                       "glibc-hidden-visibility-ldconfig.patch"
+                                       "glibc-versioned-locpath.patch"
+                                       "glibc-allow-kernel-2.6.32.patch"
+                                       "glibc-reinstate-prlimit64-fallback.patch"
+                                       "glibc-2.29-supported-locales.patch"))))))
+
 (define-public glibc-2.29
   (package
     (inherit glibc)
@@ -842,7 +859,7 @@ with the Linux kernel.")
                                        "glibc-versioned-locpath.patch"
                                        "glibc-allow-kernel-2.6.32.patch"
                                        "glibc-reinstate-prlimit64-fallback.patch"
-                                       "glibc-supported-locales.patch"))))))
+                                       "glibc-2.29-supported-locales.patch"))))))
 
 (define-public glibc-2.28
   (package
diff --git a/gnu/packages/gcc.scm b/gnu/packages/gcc.scm
index 94f7e15382..2eaca38dfb 100644
--- a/gnu/packages/gcc.scm
+++ b/gnu/packages/gcc.scm
@@ -400,6 +400,7 @@ Go.  It also includes runtime support libraries for these languages.")
                 "14l06m7nvcvb0igkbip58x59w3nq6315k6jcz3wr9ch1rn9d44bc"))
               (patches (search-patches "gcc-4.9-libsanitizer-fix.patch"
                                        "gcc-4.9-libsanitizer-ustat.patch"
+                                       "gcc-4.9-libsanitizer-mode-size.patch"
                                        "gcc-arm-bug-71399.patch"
                                        "gcc-asan-missing-include.patch"
                                        "gcc-libvtv-runpath.patch"
@@ -439,6 +440,7 @@ Go.  It also includes runtime support libraries for these languages.")
                                        "gcc-5.0-libvtv-runpath.patch"
                                        "gcc-5-source-date-epoch-1.patch"
                                        "gcc-5-source-date-epoch-2.patch"
+                                       "gcc-6-libsanitizer-mode-size.patch"
                                        "gcc-fix-texi2pod.patch"))
               (modules '((guix build utils)))
               (snippet
@@ -471,6 +473,7 @@ Go.  It also includes runtime support libraries for these languages.")
                (base32
                 "0i89fksfp6wr1xg9l8296aslcymv2idn60ip31wr9s4pwin7kwby"))
               (patches (search-patches "gcc-strmov-store-file-names.patch"
+                                       "gcc-6-libsanitizer-mode-size.patch"
                                        "gcc-6-source-date-epoch-1.patch"
                                        "gcc-6-source-date-epoch-2.patch"
                                        "gcc-5.0-libvtv-runpath.patch"))))
@@ -500,6 +503,7 @@ Go.  It also includes runtime support libraries for these languages.")
                (base32
                 "0qg6kqc5l72hpnj4vr6l0p69qav0rh4anlkk3y55540zy3klc6dq"))
               (patches (search-patches "gcc-strmov-store-file-names.patch"
+                                       "gcc-7-libsanitizer-mode-size.patch"
                                        "gcc-5.0-libvtv-runpath.patch"))))
     (description
      "GCC is the GNU Compiler Collection.  It provides compiler front-ends
@@ -518,6 +522,7 @@ It also includes runtime support libraries for these languages.")))
                (base32
                 "0b3xv411xhlnjmin2979nxcbnidgvzqdf4nbhix99x60dkzavfk4"))
               (patches (search-patches "gcc-8-strmov-store-file-names.patch"
+                                       "gcc-8-libsanitizer-mode-size.patch"
                                        "gcc-5.0-libvtv-runpath.patch"))))))
 
 (define-public gcc-9
@@ -532,6 +537,7 @@ It also includes runtime support libraries for these languages.")))
              (base32
               "01mj3yk7z49i49168hg2cg7qs4bsccrrnv7pjmbdlf8j2a7z0vpa"))
             (patches (search-patches "gcc-9-strmov-store-file-names.patch"
+                                     "gcc-9-libsanitizer-mode-size.patch"
                                      "gcc-9-asan-fix-limits-include.patch"
                                      "gcc-5.0-libvtv-runpath.patch"))))))
 
diff --git a/gnu/packages/patches/gcc-4.9-libsanitizer-mode-size.patch b/gnu/packages/patches/gcc-4.9-libsanitizer-mode-size.patch
new file mode 100644
index 0000000000..7df22c21aa
--- /dev/null
+++ b/gnu/packages/patches/gcc-4.9-libsanitizer-mode-size.patch
@@ -0,0 +1,52 @@
+Fix assertion failure in libsanitizer when using glibc 2.31 and later.
+
+https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92154
+https://reviews.llvm.org/D69104
+
+Adapted from these upstream revision:
+
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=277981
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=279653
+
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+index 196eb3b3c64..b588e07e5ab 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+@@ -928,7 +928,11 @@ CHECK_SIZE_AND_OFFSET(ipc_perm, uid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, gid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cuid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cgid);
++#if !SANITIZER_LINUX || __GLIBC_PREREQ (2, 31)
++/* glibc 2.30 and earlier provided 16-bit mode field instead of 32-bit
++   on many architectures.  */
+ CHECK_SIZE_AND_OFFSET(ipc_perm, mode);
++#endif
+ CHECK_SIZE_AND_OFFSET(ipc_perm, __seq);
+ 
+ CHECK_TYPE_SIZE(shmid_ds);
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+index aec950454b3..6d94fc65c28 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+@@ -154,20 +154,13 @@ namespace __sanitizer {
+     u64 __unused1;
+     u64 __unused2;
+ #elif defined(__sparc__)
+-# if defined(__arch64__)
+     unsigned mode;
+-    unsigned short __pad1;
+-# else
+-    unsigned short __pad1;
+-    unsigned short mode;
+     unsigned short __pad2;
+-# endif
+     unsigned short __seq;
+     unsigned long long __unused1;
+     unsigned long long __unused2;
+ #else
+-    unsigned short mode;
+-    unsigned short __pad1;
++    unsigned int mode;
+     unsigned short __seq;
+     unsigned short __pad2;
+ #if defined(__x86_64__) && !defined(_LP64)
diff --git a/gnu/packages/patches/gcc-6-libsanitizer-mode-size.patch b/gnu/packages/patches/gcc-6-libsanitizer-mode-size.patch
new file mode 100644
index 0000000000..005e3c4079
--- /dev/null
+++ b/gnu/packages/patches/gcc-6-libsanitizer-mode-size.patch
@@ -0,0 +1,53 @@
+Fix assertion failure in libsanitizer when using glibc 2.31 and later.
+
+https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92154
+https://reviews.llvm.org/D69104
+
+Adapted from these upstream revision:
+
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=277981
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=279653
+
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+index 069d8d557de..c49c28c6e07 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+@@ -1130,8 +1130,9 @@ CHECK_SIZE_AND_OFFSET(ipc_perm, cgid);
+ #ifndef __GLIBC_PREREQ
+ #define __GLIBC_PREREQ(x, y) 0
+ #endif
+-#if !defined(__aarch64__) || !SANITIZER_LINUX || __GLIBC_PREREQ (2, 21)
+-/* On aarch64 glibc 2.20 and earlier provided incorrect mode field.  */
++#if !SANITIZER_LINUX || __GLIBC_PREREQ (2, 31)
++/* glibc 2.30 and earlier provided 16-bit mode field instead of 32-bit
++   on many architectures.  */
+ CHECK_SIZE_AND_OFFSET(ipc_perm, mode);
+ #endif
+ 
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+index 304d04e3935..6dee89c97e1 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+@@ -207,20 +207,13 @@ namespace __sanitizer {
+     unsigned long __unused1;
+     unsigned long __unused2;
+ #elif defined(__sparc__)
+-# if defined(__arch64__)
+     unsigned mode;
+-    unsigned short __pad1;
+-# else
+-    unsigned short __pad1;
+-    unsigned short mode;
+     unsigned short __pad2;
+-# endif
+     unsigned short __seq;
+     unsigned long long __unused1;
+     unsigned long long __unused2;
+ #else
+-    unsigned short mode;
+-    unsigned short __pad1;
++    unsigned int mode;
+     unsigned short __seq;
+     unsigned short __pad2;
+ #if defined(__x86_64__) && !defined(_LP64)
+
diff --git a/gnu/packages/patches/gcc-7-libsanitizer-mode-size.patch b/gnu/packages/patches/gcc-7-libsanitizer-mode-size.patch
new file mode 100644
index 0000000000..41b4a4cac6
--- /dev/null
+++ b/gnu/packages/patches/gcc-7-libsanitizer-mode-size.patch
@@ -0,0 +1,53 @@
+Fix assertion failure in libsanitizer when using glibc 2.31 and later.
+
+https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92154
+https://reviews.llvm.org/D69104
+
+Adapted from these upstream revision:
+
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=277981
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=279653
+
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+index 97eae3fc7bc..4089d4695e2 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+@@ -1145,8 +1145,9 @@ CHECK_SIZE_AND_OFFSET(ipc_perm, uid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, gid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cuid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cgid);
+-#if !defined(__aarch64__) || !SANITIZER_LINUX || __GLIBC_PREREQ (2, 21)
+-/* On aarch64 glibc 2.20 and earlier provided incorrect mode field.  */
++#if !SANITIZER_LINUX || __GLIBC_PREREQ (2, 31)
++/* glibc 2.30 and earlier provided 16-bit mode field instead of 32-bit
++   on many architectures.  */
+ CHECK_SIZE_AND_OFFSET(ipc_perm, mode);
+ #endif
+ 
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+index c139322839a..7c3c2d866e5 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+@@ -211,20 +211,13 @@ namespace __sanitizer {
+     unsigned long __unused1;
+     unsigned long __unused2;
+ #elif defined(__sparc__)
+-# if defined(__arch64__)
+     unsigned mode;
+-    unsigned short __pad1;
+-# else
+-    unsigned short __pad1;
+-    unsigned short mode;
+     unsigned short __pad2;
+-# endif
+     unsigned short __seq;
+     unsigned long long __unused1;
+     unsigned long long __unused2;
+ #else
+-    unsigned short mode;
+-    unsigned short __pad1;
++    unsigned int mode;
+     unsigned short __seq;
+     unsigned short __pad2;
+ #if defined(__x86_64__) && !defined(_LP64)
+
diff --git a/gnu/packages/patches/gcc-8-libsanitizer-mode-size.patch b/gnu/packages/patches/gcc-8-libsanitizer-mode-size.patch
new file mode 100644
index 0000000000..e343034991
--- /dev/null
+++ b/gnu/packages/patches/gcc-8-libsanitizer-mode-size.patch
@@ -0,0 +1,56 @@
+Fix assertion failure in libsanitizer when using glibc 2.31 and later.
+
+https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92154
+https://reviews.llvm.org/D69104
+
+Adapted from these upstream revision:
+
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=277981
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=279653
+
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+index a915d37cdfe..5c720b2e700 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+@@ -1147,8 +1147,9 @@ CHECK_SIZE_AND_OFFSET(ipc_perm, uid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, gid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cuid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cgid);
+-#if !defined(__aarch64__) || !SANITIZER_LINUX || __GLIBC_PREREQ (2, 21)
+-/* On aarch64 glibc 2.20 and earlier provided incorrect mode field.  */
++#if !SANITIZER_LINUX || __GLIBC_PREREQ (2, 31)
++/* glibc 2.30 and earlier provided 16-bit mode field instead of 32-bit
++   on many architectures.  */
+ CHECK_SIZE_AND_OFFSET(ipc_perm, mode);
+ #endif
+ 
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+index 4d11d071776..eda75a7cd84 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+@@ -210,14 +210,8 @@ namespace __sanitizer {
+     u64 __unused1;
+     u64 __unused2;
+ #elif defined(__sparc__)
+-#if defined(__arch64__)
+     unsigned mode;
+-    unsigned short __pad1;
+-#else
+-    unsigned short __pad1;
+-    unsigned short mode;
+     unsigned short __pad2;
+-#endif
+     unsigned short __seq;
+     unsigned long long __unused1;
+     unsigned long long __unused2;
+@@ -228,8 +222,7 @@ namespace __sanitizer {
+     unsigned long __unused1;
+     unsigned long __unused2;
+ #else
+-    unsigned short mode;
+-    unsigned short __pad1;
++    unsigned int mode;
+     unsigned short __seq;
+     unsigned short __pad2;
+ #if defined(__x86_64__) && !defined(_LP64)
+
diff --git a/gnu/packages/patches/gcc-9-libsanitizer-mode-size.patch b/gnu/packages/patches/gcc-9-libsanitizer-mode-size.patch
new file mode 100644
index 0000000000..9e99a3d198
--- /dev/null
+++ b/gnu/packages/patches/gcc-9-libsanitizer-mode-size.patch
@@ -0,0 +1,58 @@
+Fix assertion failure in libsanitizer when using glibc 2.31 and later.
+
+https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92154
+https://reviews.llvm.org/D69104
+
+This is a combination of these upstream revisions:
+
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=277981
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=279653
+
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+index 6cd4a5bac8b..d823a12190c 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+@@ -1156,8 +1156,9 @@ CHECK_SIZE_AND_OFFSET(ipc_perm, uid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, gid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cuid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cgid);
+-#if !defined(__aarch64__) || !SANITIZER_LINUX || __GLIBC_PREREQ (2, 21)
+-/* On aarch64 glibc 2.20 and earlier provided incorrect mode field.  */
++#if !SANITIZER_LINUX || __GLIBC_PREREQ (2, 31)
++/* glibc 2.30 and earlier provided 16-bit mode field instead of 32-bit
++   on many architectures.  */
+ CHECK_SIZE_AND_OFFSET(ipc_perm, mode);
+ #endif
+ 
+diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+index 73af92af1e8..6a673a7c995 100644
+--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+@@ -211,26 +211,13 @@ namespace __sanitizer {
+     u64 __unused1;
+     u64 __unused2;
+ #elif defined(__sparc__)
+-#if defined(__arch64__)
+     unsigned mode;
+-    unsigned short __pad1;
+-#else
+-    unsigned short __pad1;
+-    unsigned short mode;
+     unsigned short __pad2;
+-#endif
+     unsigned short __seq;
+     unsigned long long __unused1;
+     unsigned long long __unused2;
+-#elif defined(__mips__) || defined(__aarch64__) || defined(__s390x__)
+-    unsigned int mode;
+-    unsigned short __seq;
+-    unsigned short __pad1;
+-    unsigned long __unused1;
+-    unsigned long __unused2;
+ #else
+-    unsigned short mode;
+-    unsigned short __pad1;
++    unsigned int mode;
+     unsigned short __seq;
+     unsigned short __pad2;
+ #if defined(__x86_64__) && !defined(_LP64)
diff --git a/gnu/packages/patches/glibc-2.29-supported-locales.patch b/gnu/packages/patches/glibc-2.29-supported-locales.patch
new file mode 100644
index 0000000000..05865dc7be
--- /dev/null
+++ b/gnu/packages/patches/glibc-2.29-supported-locales.patch
@@ -0,0 +1,33 @@
+This patch is taken from debian's glibc package (generate-supported.mk).
+It install the localedata/SUPPORTED file of the glibc. This file lists
+all the supported locales of the glibc.
+
+diff --git a/localedata/Makefile b/localedata/Makefile
+index 65079f9eb8..14818f84e0 100644
+--- a/localedata/Makefile
++++ b/localedata/Makefile
+@@ -169,7 +169,8 @@ endif
+ # Files to install.
+ install-others := $(addprefix $(inst_i18ndir)/, \
+ 			      $(addsuffix .gz, $(charmaps)) \
+-			      $(locales))
++			      $(locales)) \
++                   $(inst_i18ndir)/SUPPORTED
+ 
+ tests: $(objdir)/iconvdata/gconv-modules
+ 
+@@ -380,6 +381,14 @@ endif
+ 
+ include SUPPORTED
+ 
++$(inst_i18ndir)/SUPPORTED: SUPPORTED $(+force)
++	for locale in $(SUPPORTED-LOCALES); do \
++		[ $$locale = true ] && continue; \
++		echo $$locale | sed 's,/, ,' >> LOCALES; \
++	done
++	$(make-target-directory)
++	$(INSTALL_DATA) LOCALES $@
++
+ INSTALL-SUPPORTED-LOCALE-ARCHIVE=$(addprefix install-archive-, $(SUPPORTED-LOCALES))
+ INSTALL-SUPPORTED-LOCALE-FILES=$(addprefix install-files-, $(SUPPORTED-LOCALES))
+ 
\ No newline at end of file
diff --git a/gnu/packages/patches/glibc-supported-locales.patch b/gnu/packages/patches/glibc-supported-locales.patch
index 05865dc7be..28577c75c0 100644
--- a/gnu/packages/patches/glibc-supported-locales.patch
+++ b/gnu/packages/patches/glibc-supported-locales.patch
@@ -3,20 +3,19 @@ It install the localedata/SUPPORTED file of the glibc. This file lists
 all the supported locales of the glibc.
 
 diff --git a/localedata/Makefile b/localedata/Makefile
-index 65079f9eb8..14818f84e0 100644
 --- a/localedata/Makefile
 +++ b/localedata/Makefile
-@@ -169,7 +169,8 @@ endif
- # Files to install.
+@@ -176,7 +176,8 @@
+ else
  install-others := $(addprefix $(inst_i18ndir)/, \
  			      $(addsuffix .gz, $(charmaps)) \
 -			      $(locales))
 +			      $(locales)) \
 +                   $(inst_i18ndir)/SUPPORTED
+ endif
  
  tests: $(objdir)/iconvdata/gconv-modules
- 
-@@ -380,6 +381,14 @@ endif
+@@ -401,6 +402,14 @@
  
  include SUPPORTED
  
@@ -30,4 +29,4 @@ index 65079f9eb8..14818f84e0 100644
 +
  INSTALL-SUPPORTED-LOCALE-ARCHIVE=$(addprefix install-archive-, $(SUPPORTED-LOCALES))
  INSTALL-SUPPORTED-LOCALE-FILES=$(addprefix install-files-, $(SUPPORTED-LOCALES))
- 
\ No newline at end of file
+ 
-- 
2.25.0

Message #28 received at 39456-done <at> debbugs.gnu.org (full text, mbox):

From: Marius Bakke <mbakke <at> fastmail.com>
To: 39456-done <at> debbugs.gnu.org
Subject: Re: [bug#39456] [PATCH core-updates 0/6] glibc & binutils update
Date: Sat, 15 Feb 2020 22:18:41 +0100

[Message part 1 (text/plain, inline)]

Marius Bakke <mbakke <at> fastmail.com> writes:

> Marius Bakke (6):
>   gnu: linux-libre-headers: Update to 5.4.16.
>   gnu: dnsmasq: Fix build with linux-libre-headers >= 5.2.
>   gnu: binutils: Update to 2.34.
>   gnu: cross-binutils: Fix xtensa build with Binutils 2.34.
>   gnu: glibc: Update to 2.31.
>   gnu: libfaketime: Fix build with glibc 2.31.

I dropped the huge cross-binutils patch in favor of a simpler one that
keeps using Binutils 2.33.1 for the ath9k xtensa-elf target.

Pushed in 87d3e94d82..fedce7b2b4.

[signature.asc (application/pgp-signature, inline)]

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